Hardware and software of simple microprocessor systems. Discussion:Books on microprocessor technology


Name: Programming single-chip microprocessors.

The software resources of the K1810VM86 single-chip microprocessor with a fixed word length and command system, as well as programming issues in assembly language, are considered. Numerous examples of executing commands and programs for simple tasks are given.
For engineering and technical workers in the field of computer technology and automation involved in the development and use of microprocessor systems. Can serve as a teaching aid for university students specializing in electronic data processing.

The rapid development and widespread use of microprocessors, microprocessor devices and systems for various purposes (from the simplest object controllers to high-performance data processing systems) has generated a steady and ever-increasing interest in publications on microprocessor tools from engineers and technical workers of a wide variety of specialties. This reader's interest is largely satisfied by the central publishing houses of our country, which in recent years have published a number of monographs by Soviet and foreign authors devoted to this topic. These publications have to some extent satisfied the reader's demand for literature that reflects a number of organizational issues, operating features and specific application of microprocessor devices and systems. However, the range of microprocessor technology produced by the domestic industry is constantly growing, and the microprocessor technology itself is rapidly improving and becoming more complex. This process is accompanied by an increasing need for publications that are devoted to the presentation of issues related to the structural organization of the latest microprocessors, the architecture of systems based on them, tools and methods of programming and the development of system and application software.

Chapter 1. Microprocessor K1810VM86 - a new stage in the development of microcircuitry
1.1. general characteristics microprocessor
1.2. Structural design of the MP and the purpose of the housing terminals
1.3. Microprocessor block diagram
1.4. MP model for a programmer
1.5. Memory organization
1.6. Input Output
1.7. Multiprocessing tools
1.8. Interrupts
1.9. Microprocessor control
Chapter 2. Addressing modes and microprocessor instruction system
2.1. Introduction to Assembly Language
2 1.1. Basic assembly language constructs
2.1.2. Statement Format
2.1.3. Operator elements
2.2. Addressing modes
2.3. Command system
2.3.1. Data transfer commands
2.3.2. Arithmetic instructions
2.3.3. Logical Operations and Shift Instructions
2.3.4. Control Transfer Commands
2.3.5. Chained commands
2.3.6. Microprocessor Control Commands
2.4. Software compatibility microprocessors K580 and K1810
Chapter 3: Programming in Assembly Language
3.1. Example of a completed program
3.2. Variables
3.3. Segment Control Directives
3.4. Naming Directives
3.5. Expressions
3.6. Procedure Directives
3.7. Directives for connecting modules and segments
3.8. Examples of assembler programs
Chapter 4. Features of hardware configurations
4.1. Bus cycle
4.2. Address and data buses
4.3. System data bus
4.4. Operating modes
4.5. Multiprocessor systems
4 6. Synchronization
4 7, Microprocessor reset
4.8. Ready signal
4.9. I/O Interface Conclusion
Bibliography

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INTRODUCTION 3

1 Logical structure of a microprocessor system 4

1.1 Logical structure of a developed microprocessor system 9

2.1 Information highways 12

2.2 Address Trunk 12

2.3 Data Highway 12

2.4 Control line 13

3 Classification MP 15

Conclusion 19

REFERENCES 21

INTRODUCTION

Development of microelectronics in the early 1970s led to the emergence of microprocessors (MP) - a new type of large integrated circuits (LSI), which are universal in purpose, functionally complete devices, in their functions and structure reminiscent of a simplified version of conventional computer processors, but having incomparably smaller sizes. The first message about the creation of a microprocessor appeared in 1972. Microprocessors belong to a class of microcircuits, the feature of which is the ability program control operation of the LSI using a specific set of commands.

The scope of application of MPBIS is unusually wide: from complex high-performance computing systems to the simplest machines and mechanisms.

MPBIS are universal programmable elements, from a small number of which it is possible to build microprocessor systems with a structure and functions similar to traditional computers.

However, the low cost, simplicity and reliability of microprocessor systems make it possible to integrate them into various equipment. Availability of unprecedentedly cheap computing power allows you to give such equipment new properties and significantly expand its functionality. In some cases, these properties are so unusual that there has been a tendency to characterize microprocessor equipment with the word “intelligent.”
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1 Logical structure of a microprocessor system

Microprocessor is a functionally complete universal software-controlled device that carries out the process of digital information processing and control, performed on one or more LSIs.

^ Microprocessor LSI (MP LSI) – an integrated circuit that performs the function of an MP or its part. Essentially, this is an LSI with a processor organization designed for building microprocessor systems.

^ Microprocessor kit (MPC) is a set of MP and other LSIs and VLSIs, compatible in design and technological design and intended for joint use in the construction of MP, microcomputers and other computing tools. (chipset).

The logical structure (architecture) of microprocessors is focused on achieving universality of application, high performance and manufacturability. MP versatility is determined by the possibility of their diverse use and is provided by software control of a microprocessor, allowing the production software setup MP for the implementation of certain functions, a backbone-modular construction principle, as well as special hardware and logical means: super-operational register memory, multi-level interrupt system, direct memory access, software-configurable I/O control circuits, etc.

Relatively high MP performance is achieved by using high-speed LSIs and VLSIs and special architectural solutions for their construction, such as stack memory, various addressing methods, a flexible instruction system, etc.

Manufacturability microprocessor tools are provided by a modular design principle, which involves the implementation of these tools in the form of a set of functionally complete LSIs, easily combined into appropriate computing devices, machines, complexes and systems.

Microprocessors with large computing and logical capabilities, high versatility and flexibility are characterized by low cost, uniquely small sizes, and high reliability. Thanks to these features, MPs serve as system elements on the basis of which various universal and specialized microprocessor systems, microcomputers, programmable microcontrollers are created, directly built into devices, machines, technological installations, and allowing to achieve a significant increase in the level of automation of technological processes, saving energy, raw materials, materials , increasing productivity and quality of work.

The advantage of MP compared to large processors is that the power of the latter is shared among many users (tasks), while MP is intended for use by a single user (task). As a result, the software is greatly simplified. In mainframe computers, software tools support their functioning (primarily operating system) require large overheads in addition to significant hardware costs. This kind of cost is much lower or virtually absent in microprocessor systems. The advantages of MP increase even more as their capacity and speed increase. Existing MPs are in many respects superior to conventional and minicomputer processors that were produced 10 years ago. Therefore, the “micro” prefix should be interpreted in terms of the size and cost of MP and MP systems, rather than their capabilities.

A real microprocessor-based electronic system contains a significant number functional devices, one of which is the microprocessor. All system devices have a standard interface and are connected to a single information highway, as shown in Figure 1.1.

The microprocessor performs in the system the functions of a central control device and an arithmetic-logical data conversion device. As a control device, it generates sequences of clock and logic signals that determine the firing sequences of all logic devices in the system. The microprocessor sets and sequentially carries out microoperations for retrieving program commands from system memory, decoding them and executing them. The type of microprocessor operations is determined by the opcode in the instruction. In accordance with these codes, the microprocessor performs arithmetic, logical or other operations on numbers represented in binary or coded BCD code.

Numbers undergoing operational transformations in the arithmetic-logical unit of the microprocessor are called operands. The operand can be one of the original numbers, a result, a constant, or some parameter. An operation in a microprocessor is performed on one or two operands.

The memory of a microprocessor system is physically implemented on the basis of various memories. Technical and economic feasibility leads to the construction of hierarchical memory based on semiconductor permanent and random access memory devices and magnetic external storage devices.


Figure 1.1 - Logical structure of a microprocessor system
Semiconductor ROM read-only memory devices allow only reading of pre-recorded data during system operation. They have high operating speed and are non-volatile, i.e. retain information when power is turned off.

Semiconductor random access memory devices (RAM) operate in online modes (coinciding with the rate of operation of the microprocessor) writing and reading data. The disadvantage of RAM is their volatility, i.e. Loss of recorded information when the power is turned off.

The system memory is addressable, i.e. Each word is recorded in a memory cell with its own unique address. A word is a collection of binary units (bits) - binary bits interpreted as a single number or several semantic groups binary digits. To receive a number from memory or write a number to memory, you must precisely specify its address in memory and perform the operation of reading data from memory.

Data input devices (DID) - any means designed to transfer data from outside to microprocessor registers or to memory (control panel keyboard, input from punched tapes and punched cards, external storage devices on magnetic tapes, cassettes, disks, displays, etc.) .

Data output devices (DOU) are any means capable of receiving data transmitted from microprocessor registers or memory cells (displays, printing devices, external storage devices, control panel, etc.).

To connect various input or output devices (as well as combined input-output devices), it is necessary to bring all their connections and signals to a standard form, i.e. coordinate interfaces. For this, a special hardware unit is used - the IR information controller, which has a standard interface on the side of connection to the information highway and a non-standard interface on the side of input-output devices, i.e. which is a converter of interface interfaces.

The MP microprocessor, RAM and ROM, together with computers intended for operations with a person or other electronic system, are called microcomputers. A microcomputer is a computer, the central part of which, consisting of a processor, RAM, ROM, and information controller, is built on the basis of a LSI. The use of LSIs as the main elemental components provides microcomputers with such advantages over other types of computers as compactness, reliability, low material consumption, low power consumption and cost. But the backbone structure of the microcomputer and the speed limitations of the microprocessor determine the moderate performance characteristics of the microcomputer. This refers to microcomputers based on microprocessors on one or more chips. In microcomputers based on bipolar microprocessor sections, high performance can be achieved through the implementation of pipeline data processing and high-speed, highly efficient control of the computing process, even with a backbone structure.

A microcomputer becomes a central part of an electronic monitoring, control and computing system when it is introduced into the control loop of a certain object (process). To interface with a microcomputer, the object (process) must be equipped with state sensors and actuators. Sensors act as sources of information input to the microcomputer, and actuators act as receivers of output information. To coordinate interfaces, the connection of sensors and actuators in the system is carried out through sensor and actuator interface blocks.

Depending on the characteristics of the object (process) and the capabilities of the microprocessor, the complexity of each device or block is established at the design stage. Parts of the system can develop or degenerate, but must be ensured general principle construction and operation of all electronic control systems. Due to the direct relationship between the functions of software and hardware, when building an electronic system, it is possible to develop either the hardware or complicate the software. It is these circumstances that determine the widespread possibilities of using microprocessor control systems in almost all areas.

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1.1 Logical structure of a developed microprocessor system

Figure 1.2 shows the generalized logical structure of a microcomputer, in which programmable controllers are used as all control blocks of computer devices, for example, the controller of the KSPU system control panel. It is used to work with the SPU system control panel. All input-output devices are controlled by controllers of input-output devices KUVV or group controllers of input-output devices GrKUVV.

RAM and ROM read-only storage devices are controlled using the corresponding RAM and KPZU controllers. With this type of computer organization, the central processor (CPU) provides programmable controllers only with high-level control information detailed by the controller. Therefore, the amount of control information on the system information highway is sharply reduced, which makes it possible to increase the data transfer rate.

Essentially, this diagram shows a multiprocessor computing system in which, in the limit, the controller has the same capabilities as the central processor.

The low cost and high reliability of LSIs make it possible to achieve the desired parameters by introducing distributed processing in all subsystems of the computer system, which determines new ways of organizing computing processes in systems with decentralized control and information processing.

Figure 1.2 - Generalized logical structure of a microcomputer with microprocessor controllers

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2 Microprocessor interface

To include a microprocessor in any microprocessor system, it is necessary to establish uniform principles and means of interfacing it with other devices of the system, i.e. unified interface.

A unified interface is a set of rules that establish uniform principles for the interaction of devices of a microprocessor system. The interface includes hardware for connecting devices (connector and connections), the nomenclature and nature of the connections, software that describes the nature of the interface signals and their timing diagram, as well as a description of the electrical parameters of the signals.

Figure 2.1 - Generalized logical structure of a microcomputer with microprocessor controllers
Figure 2.1 shows a general diagram of the interaction of the MP microprocessor with the input-output devices of the airborne device and RAM in the microprocessor system. Communication between the MP and the airborne device requires five communication groups provided through the housing terminals. Bus group 1 transmits the device selection code (address), bus 2 carries the read-write control signal, bus 3 carries the interrupt request signal, buses 4 and 5 are used to transfer data from the processor to the airborne device and from the airborne device to the MP. The connection between the MP and RAM also contains five groups of connections that must be provided through the terminals of the MP housing. Bus group 6 transmits the address to RAM, bus 7 is needed for read/write control, signals on bus 8 receive commands to the processor, and buses 9 and 10 ensure data transfer from RAM to the MP and back.
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2.1 Information highways

When designing LSIs and devices based on them, it is necessary to take into account the complexity of implementing branched connections between various nodes (blocks) and devices. Therefore, backbone communication structures, to which the inputs and outputs of electronic nodes (blocks) are connected, have been practically implemented and have become widespread. The information highway (MI) is a set of conductors (buses) or cables, the physical properties of which ensure the transmission of high-frequency information signals. Electronic nodes (blocks) connected to the information highway must have certain properties, otherwise short-circuited connections and low-resistance loads may form.
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2.2 Address Trunk

In a simple microprocessor system, only the microprocessor can generate the addresses of information transmitted in the system. Therefore, the address highway (MA) is unidirectional: the microprocessor generates address code signals, and other devices connected to the MA can only perceive them, continuously performing the microoperation of identifying the address code.

The number of address buses coincides with the width of the transmitted address code. If 16-bit code is used, then the system is allowed to generate
=65536 addresses. These may all refer to memory cell addresses or to memory cell addresses and data register addresses of I/O devices.
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2.3 Data Highway

The microprocessor, as well as RAM, VRAM, and displays can receive or transmit data. Other devices can either only receive data, such as a print device, or only output it, such as a ROM.

To provide full system capabilities, the data backbone is bidirectional. Its capacity is determined by the capacity of the microprocessor and is equal to 2, 4, 8, 16 and 32 bits. If the microprocessor processes data using double-bit programs, then the double word is sent in two cycles, i.e. time multiplexing takes place (this was also used in the first few microprocessors when a common address and data backbone was used).
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2.4 Control line

The microprocessor and some I/O device buses generate control signals to synchronize and determine device operations. These signals are transmitted over a set of unidirectional buses, which generally form a control signal (MU) highway. All control signals in electronic system coordinated with system synchronization signals. These signals define the start and sequence of firing, as various devices system, as well as various blocks and nodes inside all LSI chips. To set the main sequence of synchronizing pulses, as a rule, an external quartz or a generator based on it is used. The synchronization signals issued by the microprocessor are single-phase, less often two-phase.

Each microprocessor has a unique control signal system. Therefore, a specific description of all MU buses, as well as the pinout of the housing terminals, is given in technical documentation to a specific microprocessor. However, almost all microprocessors share common signals. Among them is the “Reset” signal - an input signal generated on the system control panel. It leads to resetting all internal registers of the microprocessor and loading the program counter - a node that determines the sequence of execution of program commands - with the initial value of the address where the first program command is written.

The most important control function of the microprocessor is determining data flows in the system. The microprocessor recalls command words from memory while reading them, accesses memory for operands or external devices for new data, can write the result of an operation to memory or, having generated an array of data, determine the need to output it to external devices. When the microprocessor sends data to some device, a data write operation occurs, and when it receives data from some device, it reads data from its information register and performs a data read operation. To set the direction of data transfer along the MD, the microprocessor generates “Read/Write” signals transmitted over one of the MU buses.

The specificity of data input/output devices is such that information may be lost if the MP does not carry out an operation with the device in a timely manner. Therefore, these devices generate “Processor Interrupt Request” signals, alerting the microprocessor to a ready (or faulty) state. The microprocessor has an input for receiving at least one “Processor Interrupt Request” signal. If the request is accepted, the MP informs the system by generating a response signal “Interruption request satisfied.”

The different operating speeds of the I/O device and the microprocessor necessitate stopping the processor while preparing data in an external device. Therefore, the microprocessor wait operating mode is determined by the external signal “Data prepared (data not prepared)”. In total, up to a dozen (or more) different control signals are transmitted to the MU.

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3 MP classification

The MP is characterized by a large number of parameters, since, on the one hand, it is functionally a complex software-controlled digital processor, i.e. a computer device, and on the other hand, an integrated circuit or circuits with a high degree of integration of elements, i.e. electronic device.

In general, MPs can be classified according to various characteristics the main ones are:

1) the type of microelectronic technology used in the manufacture of MP LSIs.

According to technological implementation, they are distinguished:

R-MDP technologies (the first types of MP), n-MDP technologies, KMDP technologies, TTL technologies, ESL technologies, I 2 L technologies. With the exception of r-MDD technology and the limited use of TTL technology, all others are currently effectively used in the manufacture of LSI and VLSI.

2) the number of crystals forming the MP (single-crystal and multi-crystal).

Single-chip MPs have a fixed bit depth without the possibility of increasing it, as well as a fixed command system, since the microprograms corresponding to the commands are “hardwired” inside the chip. Multi-chip MPs have the ability to increase their bit depth due to serial connection same type of microprocessor elements (sections), implemented in the form of separate LSIs.

A distinctive feature of multi-chip MPs compared to single-chip ones is also that they do not have a fixed command system. The user has the ability to create his own command system.

However, the design of computing devices based on multi-chip MPs is more complex.

3) type of case (there are about two dozen of them);

4) bit depth. The MP bit capacity shows how many bits of data it can

Receive and process in its registers at one time (in one clock cycle).

The bit depth of the MP largely determines the level of complexity of tasks that can be solved using a specific set of MP.

Low-discharge MTs are used in devices with binary decimal system notation and low speed of data processing (calculators, cash registers, parameter meters, etc.).

Eight- and sixteen-bit MPs have significant computing capabilities and are used in processing alphanumeric information, in communication systems, CNC machines, etc.

High-bit microprocessors (32 and higher) allow you to create more compact programs with a minimum of instructions, which sharply reduces the cost of debugging programs, which can reach 50...70% of the cost of all technical means of the microprocessor complex.

5) performance (clock frequency, command execution time). The execution of each command takes a certain number of clock cycles. The higher the clock frequency, the more commands the MP can execute per unit time, the higher its performance.

The performance of an MP is determined by the time it takes to solve a number of test problems and depends on the speed of performing simple operations, the bit capacity, the number of general-purpose registers, the structure of input-output circuits and other factors.

6) addressable memory capacity. (volume).

It characterizes the information capabilities of the MP complex (currently reaching tens of GB) and taking into account the wide range of peripheral devices connected to the MP as part of the complex (high-capacity RAM units, floppy disk drives, CDs, printers, scanners, etc. .), organizing memory addressing is one of the most important problems in designing an MP complex.

7) type of control device;

8) command system (number of commands, addressing methods).

During operation, the MP services data located in its registers (internal cells), in the RAM field, as well as data located in the external ports of the processor. It interprets some of the data directly as data, some of the data as address data, and some as commands. The set of all possible commands that the MP can execute on data forms the so-called MP command system. MPs belonging to the same family have the same or similar command systems. MPs belonging to different families differ in command systems and are not interchangeable.

There are MPs with an extended and reduced command system. The wider the set of MP system commands, the longer the formal command record (in bytes), the higher the average duration of execution of one command, measured in MP operation cycles. For example, the instruction set of Intel Pentium processors currently contains more than a thousand different commands. Such processors are called processors with extended instruction set– CISC processors (CISC – Complex Instruction Set Computer).

In contrast to CISC processors, RISC (Reduced Instruction Set Computer) architecture processors appeared in the mid-80s - processors with reduced instruction set.

With this architecture, the number of commands in the system is much smaller, and each of them executes much faster.

CISC processors are used in general-purpose computing systems.

RISC processors are used in specialized computing systems or devices focused on performing uniform operations.

AMD produces MPs of the AMD-K6 family, which are based on an internal core made according to RISC architecture and an external structure made according to CISC architecture. Thus, MPs appeared that were compatible with x86 MPs, but had a hybrid architecture.

The MP command system, as a rule, contains the following types of commands:


  1. calculation commands (arithmetic and logical);

  2. data transfer commands;

  3. control commands (conditional and unconditional transitions);

  4. I/O commands;

  5. commands for calling subroutines;

  6. auxiliary commands;
In accordance with the address part of the instruction, memory, register or I/O device can be accessed.

By the way, MP x86 have the most complex command system in the world.

9) number of interrupt levels;

10) opportunity direct access to memory;

11) number and levels of supply voltages;

As the MF develops, the supply voltage gradually decreases. Early models of x86 processors had a supply voltage of 5V. With the transition to Intel Pentium processors, it was lowered to 3.3V, and currently it is less than 3V. Moreover, the MP core is powered by a reduced voltage of 2.2V. Reducing the operating voltage allows you to reduce the distance between structural elements in an MP crystal up to ten thousandths of a millimeter without fear of electrical breakdown.

12) signal levels;

13) power consumption;

Currently, it ranges from 10...20 mW to 1...3 W for modern MPs, depending on the work performed.

14) temperature range;

15) noise immunity;

16) load capacity;

17) reliability, etc.;

Over the past 20 years, MP technology, architecture and circuitry have developed very quickly. This development was marked by the competition between MDP and bipolar microelectronics technologies.

Conclusion

Microprocessors are widely used in test and control systems; control systems technological processes; software control of machines; monitoring communication line states; subsystems of primary information processing and control systems for industrial purposes and automation systems for scientific experiments; subsystems for controlling peripheral equipment of computer systems and complexes; specialized computing devices.

Cheap microprocessors are used in watches, calculators, film and photo cameras, radios and televisions. Microprocessors (for example, single-chip microprocessors of the K580 series) are installed in locks and bells, home appliances and devices.

More expensive microprocessors successfully compete with mechanical and electromechanical control units of “hard” or “hardware” logic.

Let's take, for example, a common and widely used mechanical tool - an electric drill. The microprocessor built into it allows you to take into account the drilling resistance and automatically change the rotation speed depending on the hardness of the material being processed. When using a drill to tighten screws and nuts, the microprocessor turns off the power to the electric motor until the operation is completed, which is completed due to inertia.

The production of electronic games using microprocessors and microcontrollers is rapidly developing. It not only generates interesting means of entertainment, but also makes it possible to test and develop logical conclusions, dexterity and reaction speed. Games with or without a TV indicator provide complex functions due to the use of logically more powerful but affordable microprocessors.

Microprocessors are effectively built into displays, on-screen consoles and terminals, where they are assigned the functions of data editing, control,

Generating characters and storing and reproducing images.

Microprocessors take over the functions pre-treatment information of external devices, conversion of data formats, controllers of electromechanical external devices. For these purposes, microprocessors of the K580, K536, K1803 series are used.

Microprocessors in communication equipment make it possible to perform error control, encode and decode information, and control transceiver devices. The use of microprocessors will make it possible to reduce the required width of television and telephone channels several times and create a new generation of communication equipment.

Microprocessor-based tools solve complex technical development problems various systems collection and processing of information, where general functions boil down to transmitting multiple signals to one center for assessment and decision making. For example, in medicine, to monitor the condition of seriously ill patients around the clock, it is necessary to periodically measure blood pressure, heart and respiratory rates, electrocardiogram parameters, etc. Centralized system based on a large or minicomputer for these purposes is cumbersome and quite expensive. A microprocessor-based distributed diagnostic system has high survivability, is simple in organization and allows for good economic performance.

Summarizing the considered examples of the introduction of microprocessor technology, we can pose the question this way: scientific and technological progress is not possible without a transition from previously used evolutionary methods (improvement of existing technologies, partial modernization of machines and equipment, etc.) to revolutionary shifts, to fundamentally new technological systems that provide the highest efficiency.

This requires the re-equipment of the entire industry based on modern achievements science and technology. Microprocessor systems play an important role in solving this problem.

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BIBLIOGRAPHICAL LIST


  1. Novikov Yu.V. [Text] Fundamentals of digital circuitry. Basic elements and diagrams. Design methods.-M.: 2001.

  2. Novikov Yu.V., Skorobogatov P.K. [Text] Fundamentals of microprocessor technology. Lecture course. M.: INTUIT.RU, 2003.

  3. Pukhalsky G.I., Novoseltseva T.Ya. [Text] Digital devices: Textbook. manual for technical colleges. - St. Petersburg: 2006.

  4. Bukreev I.N., Goryachev V.I., Mansurov B.M. [Text] Microelectronic circuits of digital devices. -M.: Radio and communication, 2000.

TOPIC 3.1 Typical microcomputer structure.

ACTIVITY 3.1.1 Two ways to organize a microcomputer: with different data and address buses and with a multiplexed data and address bus.

LESSON QUESTIONS:

1. General information about microcomputers. Functional blocks and organization of control in a microcomputer.

2. A method of organizing a microcomputer with separate address and data buses.

3. A method for organizing a microcomputer with a multiplexed data and address bus.

FIRST QUESTION

The organization of a microcomputer based on standard microprocessor kits is determined by the principles of the formation of the IPC, the organization of the memory system, the input-output system, the interrupt system, the architectural features of the microprocessor and some characteristics of the IPC LSI. However, the main influence on the organization of microcomputers is exerted by the methods of implementing the transfer of data and addresses between the microprocessor and other components of the microcomputer. From this point of view, there is a distinction two ways to organize a microcomputer: with separate data and address buses; with multiplexed data and address bus.

Microprocessor integrated circuits (MPICs) and microcomputers built on their basis were the result of the rapid development of microelectronics, which made it possible to place complex computing structures, containing tens of thousands of transistors. The production of large integrated circuits (LSI) involves labor-intensive work on the development of circuits, photomasks and preparation of production and services for monitoring the technological parameters and characteristics of the LSI. Reducing the cost of LSI is possible only with maximum automation of the stages preceding their production and mass production. Mass production of LSI assumes wide consumer demand, and therefore the possibility of its use for a wide range of tasks. Microprocessor LSIs (MP LSIs) represent that class of integrated circuits that combine a high degree of integration, providing enormous functionality, with great versatility in application. Universality is achieved by the fact that the MP LSI implements complex devices that make it possible to perform logical and arithmetic functions on the original numbers, while the calculation process is controlled by software. Changing the calculation program allows you to calculate any complex function.



If we consider the microcomputer circuit (Fig. 1), we can come to the conclusion that it contains the same blocks on which computers of previous generations were built.

Rice. 1. Microcomputer diagram.

However, the microcomputer has some architectural differences from previous digital computers, due to the desire to combine into the LSI, on which the microcomputer is built, nodes and blocks capable of carrying out complex information transformations when minimum quantity external conductors. This feature is due to the possibility of constructing complex electronic circuits with a limitation on the number of external conductors, not exceeding, as a rule, 50 or 100 contacts.

The structure of the microcomputer processor is built taking into account these features of the LSI. The most common is a microcomputer circuit that has two or three common lines, to which, under the influence of the control device, the nodes included in the microprocessor can be alternately connected. This structure requires limited number external contacts, but the exchange of information between nodes and blocks must be carried out in a certain sequence.

In a microcomputer, the processor is built on LSIs that form the basic MP set. A microcomputer processor can be implemented in the form of one (single-chip microprocessor) or several LSIs (multi-chip microprocessor).

To build the remaining microcomputer blocks, specialized LSIs or ICs of medium degree of integration are used. The main types of ICs used in microcomputers can be classified into one of four groups: basic microprocessor set (MPC) ICs; Memory ICs; IC devices for input and output of information to the microprocessor; IC for connecting microcomputers with control objects.

Information exchange between the microprocessor and other microcomputer blocks is carried out along three highways: address, data and control.

Trunk address(MA) is used to transmit the address code used to access memory, input-output, or other external devices connected to the microprocessor.

Processed information and calculation results are transmitted via data highway(MD).

Control line(MU) transmits control signals to all microcomputer blocks, setting up desired mode devices participating in the command being executed.

The use of a large number of highways in a microcomputer, in in this example three types, provides high performance and simplifies the calculation process. It is possible to build a microcomputer with one or two highways, through which the address code and processed information are sequentially transmitted, while the command execution time increases and the organization of information exchange between nodes becomes more complicated.

The structure of a microcomputer is determined by the architecture of the microprocessor, the composition of the functional units included in the MP LSI, the number of external highways and the organization of information exchange.

Microprocessors on a single chip - single-chip MP - are distinguished by a fixed bit depth and a fixed command system. The functional completeness of single-chip MPs requires placing command decoder blocks and control devices, an arithmetic-logical block, external exchange control devices, and cascades for matching internal and external signals in one crystal.

Multichip MPs are built on the basis of a set of LSIs, which are MPCs. Each LSI included in the MPC allows the implementation of a node or functional block of an MP node. The most characteristic nodes of the MP are the arithmetic-logical unit (ALB), which forms the basis of the operating device, and the control device (CU).

The arithmetic-logical block is designed to process information in accordance with the control code received by it. The operations performed in ALB can be divided into three groups: arithmetic, shift, logical and transfer.

The following operations are usually used as arithmetic operations: addition and subtraction of two codes; adding and subtracting units; addition and subtraction with the contents of the operation sign.

Shift operations include operations of arithmetic, logical and cyclic shifts to the right and left of the contents of the ALB registers.

Logical operations and transfer operations ensure the fulfillment of basic logical functions(addition, multiplication) over the contents of registers and transferring contents between registers and between registers and external highways.

The control device generates control signals to all microcomputer blocks, synchronizing their operation, and ensures the selection of commands from memory in accordance with the established algorithm.

Let us consider in more detail the functioning of individual microcomputer blocks.

Operating device The MP, designed to perform operations on operands in accordance with the code of the instruction being executed (arithmetic, logical, shift or transfer), usually includes an ALB, general purpose register blocks (GPR), a condition register state generation block, and a local control block.

Arithmetic logic block directly performs a micro-operation on the source operands.

RON block provides storage of operands and intermediate results of calculations, is characterized by low access time and a limited number of registers.

Block for generating conditions register states writes into the conditions register a binary code characterizing the arithmetic and logical characteristics of the result of the ALB operation. The contents of the attribute register can be used by the control device to generate conditional transitions based on the results of ALB operations.

Local control unit ensures the execution of the current microcommand and controls all blocks of the operating device in accordance with the microcommand code.

Operating device structure depends on the number of external highways and the organization of information exchange along them, as well as on the organization of internal highways and the order of information exchange between the blocks of the operating device.

Operating devices implemented as part of single-chip MP LSIs are distinguished by a fixed bit depth and command system. Limitations on the number of information highways and external contacts lead to the need to organize a sequential type of information transfer, in which information is sequentially exchanged along one information highway between all internal nodes of the LSI and external highways.

Single-chip MP LSIs do not allow the construction of high-performance microprocessor systems with parallel processing information. Command execution time ranges from 2 to 10 μs. Single-chip MP LSIs are effectively used in devices that do not require high speed and have limitations in the volume of equipment and its cost. They are implemented in the K580 and K586 MP LSI series, which, along with microprocessors, contain a number of auxiliary LSIs for building microcomputers.

Microcomputer control device, ensures the execution of a sequence of micro-operations in accordance with the code of the current command and organizes the selection of program commands in accordance with the program being executed. The use of microprogramming in the implementation of a control device allows it to be created on regular structures that allow easy changes to be made to the generated sequence of control signals.

Shown in Fig. 2, a generalized diagram of a microprogram control device contains: a microprogram memory block in which microcommands are stored; microinstruction address generation unit, which generates the address of the next microinstruction, which in general depends on the code of the microinstruction being executed, the attribute codes of operations performed in the ALB, information from synchronization blocks and processor interrupts; a synchronization unit designed to receive control signals and generate a sequence of synchronization signals for the main blocks of the microcomputer to ensure a certain sequence of their operation; microinstruction decoder that generates control signals entering the microcomputer executive units.

The most common options for implementing control devices are using read-only memory (ROM) or reprogrammable memory (PROM) as microprogram memory and a control device based on a programmable logic array (PLM).

Fig 2. Generalized diagram of the control device.

In the first case, the microinstruction memory block is made on the basis of standard LSI memory such as ROM, PROM. The remaining blocks of the control device are combined into a separate LSI or executed as separate units on medium integration circuits. In a PLM-based control device, all blocks are combined into one LSI, which is actually a complete digital machine, the law of operation of which is determined by the switching of the internal highways of the matrix.

PLM control devices. In these devices, unlike the considered circuits, the functions of the microinstruction address generation unit are combined with the microprogram memory. Let's consider the diagram of such a device using the example of the K587 series MPC (Fig. 3, b).

Rice. 3. LSI circuits of the K1804 series (a) and the K587 RP1 series (b).

Device structure contains microprogram memory of PLM type, command register RgK, condition code register RgKU, next address register RgA and control sign register RSU.

Control Sign Register contains masks for the signal to write to the command register, the next address register and the condition code register. Part of the signals from the PLM output is output to control the operating part as a micro-instruction, and the other part of the PLM output signals is not output from the LSI body and is used to generate the next address and control register code. Programmable logic matrix allows analysis big number bits, eliminating the need for controlled multiplexers. The totality of all ranks RgK, RgKU And RgA used as the full address word for the PLM.

Command Register serves to receive a command code that specifies to the control device a program for sampling a sequence of microcommand codes, executing which the microprocessor implements the algorithm of this command. To do this, one of the PLM outputs is programmed to generate permission to receive a new command. The selection of a particular microinstruction during the execution of the algorithm of any microprocessor command is not always strictly specified, but may depend on conditions - the results of operations recorded in the condition register.

Address Register is the main setting element in selecting the subsequent micro-instruction. Bit depth P The address register allows the control device to create 2" stable states without changing the command code and condition code.

The ability of PLM to generate new information states by combining existing encoded states, by simply combining them, expands

logical capabilities of PLM as a digital machine. The device in question does not contain stack memory and, therefore, does not provide for modular programming. Of the devices considered, the structure of the microcomputer is most influenced by the implementation option of the control device. Three most typical options can be distinguished: implementation in a single-chip processor that combines an operating part and a control device; implementation of a control device in the form of a microprogrammed machine using ROM and PROM for recording microcommands; implementation of a control device based on PLM.

In microprocessor sets of the K587, K588, K1883 series, control devices are implemented on the basis of PLM. Microprocessor sets of the K580, K.1801, K1810, K1816, K1820 series contain a LSI, which implements a central processor and a control device with a fixed structure and command system. In MPK series K583, K589, KR1800, KR1802, KR1804, the control device is built in the form of a microprogrammed machine based on the LSIs included in these kits, which allows the consumer to implement the required command system on their basis. Microprocessor kits of the K536, K581 series are designed for building microcomputers of the “Electronics S” and “Electronics-60” families.

Microprocessor kits of the K1801 series include a single-chip MP K1801VM1, which contains a processor and a control device with a command system for the Elektronika-60 microcomputer, and a number of LSIs for building single-board microcomputers. According to their technical characteristics, MPCs of the K580, K1816, K1810, K1820 series, containing single-chip MPs, are advisable to use for producing digital automation devices, simple controllers, and also used for building micro- and mini-computers for various purposes.

Microprocessor kits of the K583, K584, K587, K588 series are designed for building microcomputers and complex controllers. Thanks to the sectional organization, a developed system of highways, and microprogrammability of control functions, they can serve as the basis for the construction of various control systems. Low power consumption and high noise immunity of MPCs of the K587 and K588 series make it possible to design on their basis numerical control systems for technological equipment and devices with restrictions on energy consumption.

High-speed MP K series K589, KP1802, KP1804 are designed for building microcomputers and high-speed automation systems, are compatible in signal levels and can complement each other. Microprocessor kits of the KR1802 and K1804 series differ in their approach to the formation of modules. In the MPC KR1804, 4-bit microprocessor LSIs contain all the elements of the microprocessor. In the MPC of the KR1802 series, individual MP functional units are executed in the LSI (LSI of 8-bit AL B, LSI of 16 4-bit RON, LSI of 16-bit arithmetic expander, etc.). The difference in the composition of the modules of the considered IPCs allows us to apply the most suitable of them in terms of functional division for various areas. The KR1800 series microprocessor kit has ultra-high performance (clock frequency 36 MHz) and is aimed at building high-performance computing tools.

SECOND QUESTION

In Fig. Figure 4 shows as an example the structure of a microcomputer implemented on the basis of the KR580 microprocessor kit. The sixteen-bit address bus (ABA) and the 8-bit data bus (SD) and control form the interface between the microprocessor (MP), on the one hand, and ROM, RAM and input-output interface devices (IOUD), on the other. The allocation of separate buses for all control signals, address information and data simplifies the organization of information exchange between individual components and reduces the execution time of commands in the microcomputer. The clock pulse generator (GTI) generates the signals necessary for the operation of the MP.

Rice. 4. Microcomputer structure with separate data and address buses.

The use of one bus reduces the number of external pins of the LSI microprocessor kit, but leads to a temporary separation of address and data transfer, i.e., to a decrease in the speed of information exchange between the processor and addressable devices, as well as to the need to use external address registers (RgA).

THIRD QUESTION

Shown in Fig. Figure 5 illustrates, using the K588 microprocessor kit as an example, the organization of a microcomputer with a multiplexed address and data bus.

Such microprogrammable microcomputers, as a rule, require the development of two-level control - microprogram and software. This allows you to have an arbitrary command system, but complicates the microcomputer.

Normal functioning of a microcomputer can be ensured only with the correct timing of the signals that determine the interaction of its components. Therefore, a significant part of the technical parameters of the MPC components are made up of various time constraints.

Rice. 5. Structure of a microcomputer with a multiplexed data and address bus.

The primary source of timing signals in a microcomputer is a clock pulse generator that produces a one-, two-, three- or four-phase sequence of pulses. The parameters of clock pulses are subject to fairly stringent requirements, including minimum and maximum pulse frequencies, maximum pulse rise and fall times, low and low tolerances. high levels pulse voltages, tolerances on the duration of clock pulses, time relationships between clock pulses of different phases. Failure to comply with the requirements for clock pulses can lead to incorrect execution of operations, since the execution of each operation consists of a sequence of actions, each of which has a very specific duration. The frequency of the clock generator is usually stabilized by quartz and implemented as a separate component of the microprocessor kit or on a microprocessor chip (as is done in the K588 microprocessor kit).

Clock pulses from the generator begin to arrive at the microprocessor immediately after the power supply is turned on, but the microprocessor starts only by a signal initial installation, supplied to its special input. Based on this signal, a specific address is written to the program counter, from which the microprocessor begins fetching program instructions. In addition, in some microprocessors, the initialization signal resets several internal registers to zero.

The simplest ways to generate an initial setting signal are: a) using a single pulse generator, triggered, for example, from a button; b) formation of an initial setting pulse upon turning on the power with a delay for the time required to set the nominal value of the supply voltage after turning on the source.

Serious restrictions are imposed on the timing parameters of the signals that ensure the interaction of microcomputer components. As long as the speed of the components is sufficient to correctly respond to all microprocessor signals, which is usually done in a microcomputer with a small number of components of one microprocessor set, no problems arise with the timing of the components. Increasing the complexity of the addressing scheme, increasing the memory capacity, and using components from other microprocessor kits can lead to non-compliance with some mandatory timing relationships and, consequently, to improper operation of the microcomputer.

Literature:

1. M.V. Naprasnik "Microprocessors and microcomputers", pp.: 81-84.

2. L.N. Presnukhin “Microprocessors”, part 1, pp.: 140-162.

ACTIVITY 3.1.2 Block diagram, characteristics and basic element base

microcomputer “MS1201.01”.

LESSON QUESTIONS:

1. Purpose, characteristics of the microcomputer “MS1201.01”.

2. Block diagram, composition and element base of the microcomputer “MS1201.01”.

3. Command system, addressing modes and operating features of the microcomputer “MS1201.01”.

FIRST QUESTION

The microcomputer “MS1201.01” is printed circuit board, intended for embedding into consumer equipment and performing the functions of input, storage, processing and output of digital information as part of this equipment.

Modifications of microcomputers differ in the type of MP, number of instructions, RAM capacity and speed, but have one basic design.

Microcomputers can be used as part of technological equipment(CNC systems 2Р22 and Kontur-1); in control, measuring and testing complexes; in general purpose digital information processing systems.

In all possible applications, a microcomputer solves the same problems: input, storage, processing and output of information.

Main characteristics:

The number system for numbers and commands is binary;

The main format for representing numbers and commands is 16 binary digits;

The operating principle of the main devices is parallel;

Performance when executing commands like “ADDITION”

With the register addressing method, 400 ± 100 thousand op/s;

With the indirect register addressing method, 180 ± 40 thousand op/s;

Number of RON – 8;

The microcomputer system channel allows direct addressing of memory areas

64 KB;

RAM capacity 28 KB 16-bit words;

System ROM capacity 4 KB words;

Power is supplied from external sources direct current With

rated voltage +5 V (+5 V and +12 V for MC1201), current not

more than 2.4 A, power consumption no more than 12.6 W;

Microcomputer time between failures is at least 10,000 hours, between failures - at least

Service life – at least 10 years;

Overall dimensions 252×296×12 mm, weight no more than 0.8 kg;

The following is accepted as the basic microcomputer software: test

monitor operating system (TMOS); operating system with

time sharing (OS DVK).

SECOND QUESTION

The microcomputer “MS1201.01” consists of the following main and auxiliary functional blocks and components.

Basic:

Processor (PRC);

System ROM (SROM);

Byte parallel interface device (UBPI);

Serial input/output device (SID);

Floppy disk drive interface device (FMD UI);

Control device for user ROM (CU ROM);

Initial start mode register (ILR);

Optoelectronic signal isolation unit (OSI).

Auxiliary:

Channel control signal corrector (CCS);

Clock generator (GTI-1, GTI-2);

Voltage converter (PN-5 V);

Signal transceivers (PP1...PP4);

Channel signal transceiver control unit (CUPP)

A microcomputer is a system of functional blocks, communication between which is carried out through a single system channel (of the “Common Bus” type) for information exchange with multiplexing of address and data buses.

The microcomputer element base is built on IC series K1801 (8 pieces), K531 (15 pieces), K155 (23 pieces), K555, KR565 (32 pieces). The basis element base are made up of K1801 series microcircuits, made according to n-channel MOS technology.

A microprocessor is built on the K1801 IC, K1801RE1 is a system ROM, K1801VP1-030 RAM control device, K1801VP1-031 byte parallel interface control device, K1801VP1-034 UBPI information transfer device, K1801VP1-035 UPVV, K1801VP1-033 GPS interface control device D.

The K531 series microcircuits are mainly used to build channel signal transceivers, and the K555 IC is a signal amplifier.

Integrated circuits of the KR565RU3 series (RU6 - MS1201.01 and MS1201.02) form a dynamic type RAM drive, the total storage capacity of the drive is 32 KB of 16-bit words or 8 memory banks of 4 KB each. Only 7 memory banks are available to the user, i.e. 28 KB words. RAM consists of an information storage device (N RAM), a RAM control device (U RAM), a buffer data register (DBR), and a bank switch P3 in Figure 2 (BVB in Scheme 1).

The system ROM is designed to store programs for the boot loader console with the float drive and the resident verification test.

It is possible to install an additional ROM chip with a capacity of 4 KB of 16-bit words into the contacting device (Fig. 2) located on the board.

Switches P1 and P2 (Fig. 2) are used to set initial start modes, register addresses and interrupt vectors of external devices.

Connector P1 is used to connect an external device to a serial I/O channel, and connector P2 is used to connect devices to a byte parallel I/O channel, as well as to connect a float drive.

Unification in design, command system, interface of the channel with a computer of the "Electronics-60" type, allows you to increase technical capabilities microcomputers by connecting through a channel additional standard functional devices, as well as unified devices developed by the user.

Rice. 1. Block diagram of the microcomputer “MS1201.01”

Rice. 2. Layout of main devices

on the microcomputer board “Electronics MS1201.01 (02)”

THIRD QUESTION

The microcomputer "MS1201.01" uses the following addressing modes: register, indirect-register, auto-incremental, indirect-auto-incremental, auto-decremental, indirect-autodecremental, index and indirect-index.

The microcomputer uses the following types of commands: addressless, unicast and two-address.

Communication between devices connected to the microcomputer channel is carried out according to the “active-passive” principle.

At any given time, only one device is active and controls the communication cycles in the channel. Information transfer is carried out according to the asynchronous principle using special synchronization signals K ENTER N; TO OUTPUT N; K SIP N; K SIA N, i.e. The signal initiating data exchange from the active device must receive a response signal from the passive device.

The microcomputer has the following priorities for servicing interruptions between interface input/output devices:

1 – from UPVV.

2 – from UI GMD.

3 – from UBPI.

There is no direct memory access device in the microcomputer. The processor RONs (R0 – R7) can serve as storage registers, index registers, auto-incremental and auto-decremental addressing registers, and other purposes. In addition, R6 functions as a stack pointer register (RUS), and R7 functions as a program counter register (PCR). The register format is 16 binary bits; for byte operations, the 8 least significant bits of the registers are used.

Due to the need for a deeper knowledge of the functioning of the MC1201 microcomputer, since two CNC systems were built on its basis - 2P22 and Kontur - 1, we will consider in more detail some issues of its functioning.

Structure of a microcomputer with a common backbone. The organization of the micro-computer “Electronics MS 1201.01” is based on the principle of communication between devices using one common highway(Fig. 3). For each device connected to the common backbone, the type of communication is the same. CPU P uses the same set of signals both for communication with RAM cells OP, and for communication with peripheral devices. Each memory cell, processor registers and peripheral registers are assigned a specific bus address. Thanks to this structure, all instructions for data stored in RAM OP, can be equally used for data in registers of peripheral devices. This principle is a very significant feature of a microcomputer with a common backbone, since the same set of commands can be used both for calculations and for input-output control Special teams input-output become unnecessary, and input-output of information can be combined with its processing. Thanks to bidirectional and asynchronous transfers, devices can send, receive, and exchange data with each other. Organizing the operation of a common backbone according to the asynchronous “request-response” principle allows you to coordinate the operation of devices operating in the widest frequency range.

Rice. 3. Structure of a microcomputer with a common backbone.

Communication between devices connected by a common highway is carried out according to the “master - executor” principle. At any given time there is only one device that controls the highway and is called a “master”. This device controls the operation of the trunk when communicating with another device connected to the trunk, called a “receiver.” A typical example of this relationship is the processor P, which serves as a master device and selects a command from RAM OP(memory is always an execution device). The master device, for example, can be a magnetic disk drive (NMD), transmitting data to OP. Thus, the communication between devices is dynamic.

The common line is used by the processor P and all I/O devices UVV. The priority system determines which device takes over control of the highway. Thus, each device connected to the bus and capable of becoming a master has a priority assigned to it.

The microcomputer in question has one priority interrupt line. In the event that two (or more) devices that are capable of becoming control devices for the bus simultaneously send requests to use the bus, control is transferred to the device whose electrical connection is closer to the processor.

Data exchange between devices connected to the bus can be carried out in the following modes:

1) software;

2) by interruption;

3) direct memory access (PDP).

Program mode- the most versatile. On the initiative and under the control of the program between the master and receiving devices Full 16-bit words or 8-bit bytes of information can be sent. The information can be commands, addresses or data. Typically, the processor, as a master device, selects instructions from memory and operands from memory or registers, and after executing the instructions, sends the results to memory or registers.

In interrupt mode Data exchange occurs at the request of the peripheral device. In this case, the processor pauses execution current program to serve the requesting device. After completing the maintenance program, the processor resumes execution of the interrupted program from the point where it was interrupted. Since a processor is generally capable of executing anywhere from a dozen to a thousand instructions during the period of time between two successive data transfers from an input/output device, it is not economically feasible to force it to remain idle during this time. Transferring data via interrupt allows the processor to work simultaneously with the I/O process and receive information about the moment of its completion.

In DMA mode(DAP) data exchange is carried out without program control from the processor and is the most in a fast way transferring data between memory and external device. Addressing and managing the size of the transferred array must be provided by the device that has received direct memory access. Typically, the DMA mode is used when exchanging data arrays between drives on magnetic disks or tapes (NMD or NML) and RAM.

The operating cycles of the bus when interacting with the processor are: “Reading” - transferring a word of data from an external device to the processor; “Write” - transfer of a word or byte of data from the processor to an external device; “Read modification - write” - transfer of a word of data from an external device to the processor, followed by writing a word (byte) of data from the processor to an external device.

Each processor instruction requires one or more bus cycles. First of all, the “Read” cycle is executed, in which a command is selected from a memory cell (the cell address is specified by the program counter). If there are no more operands that require access to memory or I/O device registers, then no additional work cycles are required to execute the instruction. However, if access to memory or an external device is necessary, one (or more) additional duty cycle is required.

Note the difference between interrupts and direct memory access operations. Interrupts change the state of the processor and therefore can only take place between processor commands. Direct Memory Access Operations can be executed within instruction execution in between individual bus cycles, since these operations do not change the state of the processor.

FEDERAL AGENCY FOR EDUCATION

STATE EDUCATIONAL INSTITUTION OF HIGHER PROFESSIONAL EDUCATION

DON STATE TECHNICAL UNIVERSITY

HARDWARE AND SOFTWARE OF SIMPLE MICROPROCESSOR SYSTEMS

Guidelines

for course work on the section

"Electronics and microprocessor technology"

Rostov-on-Don 2006

1. Purpose of the work

Acquiring practical skills in structural block diagrams and program listings in Assembly language for simple microprocessor systems (MP-systems) for controlling various processes.

2. Typical structures of data processing algorithm block diagrams

To successfully complete tasks course work students need to familiarize themselves with the command set of the KR580 processor /1/, as well as the requirements for compiling programs in Assembly language /2/, /3/, /4/, intended for microprocessor systems for automatic control of various measuring and technological processes.

The microprocessor instruction set is the basis for the design of the machine instruction block diagram. This scheme is followed only by writing and coding the program. Therefore, the block diagram must be so detailed that each block can be represented by no more than three commands.

Any block diagram can be built by combining several basic blocks: functional (sequential), loop (repetition), branching (alternative solution).

In Fig. 1 shows typical blocks of block diagrams of algorithms that are widely used in data processing programs.

The sequential structure is the most common (Fig. 1, a); it means that actions must be performed one after another. Shown in Fig. 1, b the IF-THEN-ELSE structure is used in cases where it is necessary to implement a software transition to one of two computational procedures depending on the fulfillment of some condition being checked. The IF-THEN structure (Fig. 1, c) is a simplification of the previous one and is used in cases where it is necessary to implement one computational procedure depending on the condition being tested. The DO-WHILE structure is used to check the condition for ending the cycle (Fig. 1, d). The REPEAT-UNTIL-UNTIL structure (Fig. 1, e) is similar to the previous one, but the order of the operators is different: the procedure is performed before the condition is checked. The PROCESS–WHILE structure (Fig. 1, f) is a combination of the two previous structures. And finally, in Fig. 1, g presents the DO-DEPENDING-ON structure, with the help of which the choice of action is carried out in multi-valued decisions and which is used to replace chains of IF-THEN-ELSE structures.

All listed blocks in various combinations found in algorithms for executing data processing programs.

3. Software implementation typical functions management

When designing MP control systems for various measuring or technological processes, the need arises to program such standard control procedures as

– polling the state of the binary sensor;

– waiting for an event;

– scanning a group of position sensors;

– formation of time delays;

– finding the minimum or maximum value input array of parameters;

– sorting operations, etc.

Below are some ways to software standard process control functions in relation to MP KR580VM80.

In Fig. 2. shows a diagram of connecting the binary sensor contact to the input port of the MP system. If contact S is open, then a logical one signal is present at input D5 of the input port; if contact S is closed, then D5 is logical zero. It is necessary in some part of the control program of the MP system to irrigate the value of the signal at input D5 of port 04 and, depending on its value (0 or 1), transfer control to a program fragment with a label, for example, LABEL A (if D5 = 0) or to the address marked label LABEL B (if D5=1).

Rice. 2. Binary code polling circuit

In Fig. 3, a is a block diagram, and in Fig. 3, b program “INPKEY” (key entry), implementing the procedure for polling a binary sensor. The symbolic program name "INPKEY" is used as the initial command label for that program. When programming using subroutines, you can access this binary sensor polling subroutine using the command: CALL, address INPKEY.

Rice. 3. Block diagram and listing of the binary sensor polling program

Controllers of technological objects operate in real time, and, therefore, their operation is determined by events occurring in the control object. Most often, events in the control object are recorded using binary sensors; for example, by closing or opening the zero switch when moving the executive body of the control object.

If, during the execution of the control program, it is necessary to suspend the execution of its commands until, as a result of the processes occurring in the control object, the contact S of the displacement sensor closes, then you can use a subroutine with the symbolic name “NUNT” (ambush), the block diagram of which shown in Fig. 4, b.

Rice. 4. Connection diagram of the binary sensor contact to the input port of the MP system (a) and block diagram of the event waiting algorithm

The main program of the MP system can repeatedly call this subroutine using the CALL command, address NUNT. From the block diagram of the algorithm it is clear that the program must constantly poll the signal value at input D2 of port 07 until it becomes equal to zero (the sensor contact is open), and in this case continue executing the main program of the MP system. If the transition to the event waiting loop from the main program is carried out using the CALL command, address NUNT, then returning to it from the NUNT procedure is carried out using the RET command at the end of the subroutine.

Similarly, by using different mask codes in the ANI command, it is possible to monitor multiple events detected by different binary sensors connected to other inputs of the information input port.

In Fig. 5. shows a diagram of connecting the MP system to some actuator of the control object through the information output port.

Rice. 5. Control signal generation circuit

Let us assume that this actuator operates on the “on-off” principle, i.e. can be controlled by the binary output signal of the MP system (“1” – enable, “0” – disable).

The subroutine for generating such a control action is simple and consists of only two commands. To turn on the actuator, use the “ON” subroutine:

ON: MVI A, 02; load code 000.0010 into the battery

OUT, 03; issue a control byte to port 03.

To turn off the actuator, you can use the “OFF” subroutine:

OFF: XRA A; reset the battery

OUT, 03; output byte 0000 0000 to port 03.

(output the contents of the battery byte 0000 0000 to port 03).

If other actuators are connected to the remaining seven pins of output port 03, not a binary control action is formed, but a control word byte, where each bit is assigned a 0 or 1, depending on which mechanisms should be turned off or on.

The software implementation of the time delay uses the method of program loops, in which a number is loaded into any register of the general-purpose register block (ROB) of the microprocessor, which is reduced by one with each pass of the loop. This continues until the contents of the counter register become equal to zero, which is interpreted by the program as the moment the loop exits. The delay time is determined by the number loaded into the counter register and the execution time of the instructions that form the cycle. The algorithm diagram of such a program is shown in Fig. 6.

Rice. 6. Block diagram of time delay

The program has the symbolic name “TIME” and, if called by the main program with the CALL command, address TIME, must be completed with the return command RET.

Let us assume that in an MP system using clock frequency 2 MHz (the clock cycle in this case is 0.5 μs), it is necessary to implement a time delay of 250 μs. A fragment of a program that implements a time delay must be formatted as a subroutine, since it is assumed that the main program will access it many times.

The text of the program displaying the structure of the algorithm shown in Fig. 6, next:

COUNT: DCR B; decrease by 1 content

register B JNZ, address COUNT; repeat the cycle if B≠0

RET; return to the main program if B=0.

To obtain the required time delay, it is necessary to determine the value of the number X loaded into register B. The determination of the number X is performed based on the execution time of the instructions that form this subroutine. It is necessary to take into account that the MVI B, X and RET commands are executed once, and the number of repetitions of the DCR B and JNZ commands, address COUNT is equal to the number X loaded into register B. In addition, the time delay subroutine is accessed using the CALL command, address TIME, the execution time of which must also be taken into account when calculating the time delay. The description of MP KR580IK80 commands indicates how many clock cycles of the main synchronization frequency each MP command is executed. Based on this data we can write:

CALL, TIME – 17 clock cycles – 8.5 µs;

MVI B, X – 7 clock cycles – 3.5 µs;

DCR B – 5 clock cycles – 2.5 µs;

JNZ, COUNT address – 10 clock cycles – 5.0 µs;

RET – 10 clock cycles – 5.0 µs.

Thus, once executable commands(CALL, MVI, RET) in this subroutine require 17 µs (8.5+3.5+5.0). Therefore, to obtain the required delay of 250 µs, the commands DCR B and JNZ, COUNT are needed so many times that their execution time is 233 µs, i.e. (250–17). However, the execution time for this pair of commands is (2.5+5.0). Therefore, if we take X=31, it is possible to obtain a time delay of 232.5 μs.

If the accuracy of the subroutine implementation of a time delay of 250 μs with an error of 0.5 μs satisfies the conditions of the problem, then the development of the program ends.

Based on the above calculation, we write the text of the TIME subroutine:

JNZ, address COUNT; cycle if B≠0

RET; return to the main program.

If the accuracy of representing a time interval of 250 μs with an error of 0.5 μs does not satisfy the developer, there are two options:

– implement a subroutine for an exact delay of 50 μs and repeat its call five times;

– by introducing empty NOP operations into the subroutine and correspondingly changing the command set (in order to eliminate the 0.5 µs time mismatch) to ensure accurate timing.

In many cases where MP systems are used, it is necessary to create long time delays (seconds, minutes, hours, etc.). It is impossible to do this at a frequency of 2 MHz using the previously described method, since the maximum capacity of the FFFF register pair is not enough to represent the number X sufficient to generate a delay of 1 second. Such a large delay for MP can be generated using the nested loop method (as shown in Fig. 7).

In order to obtain a delay of 1 minute, the main control program can call the ONESEC subroutine 60 times. To do this, the number 60 is loaded, for example, into register B, which functions as a decremental seconds counter, and after each run of the ONESEC subroutine its contents are reduced by 1. The text of the ONESEC program is given below.

ONESEC: MVI B, FF; outer loop counter

L1: MVI C, FB; internal loop counter

L2: NOP; precise timing

inner loop

DCR C; inner loop counter decrement

JNZ, address L2; return to inner loop if C≠0

DCR B; outer loop counter decrement

JNZ, address L1; return to the outer loop if B≠0

Rice. 7. 1 second delay algorithm

A block diagram of a typical procedure for collecting and forming an array of data from a single source in the RAM of an MP system is shown in Fig. 8. The source of input data is the input port with symbolic address NN, 8100 is the starting address of the data array, register C is used as a data counter and register pair HL is used by instructions with indirect register addressing as a data pointer; ETX – “end of array” terminator.

Rice. 8. Typical data collection procedure

The program looks like:

LXI H, 8100; start address record

MVI C, C, 00; counter = 0

SAVE: IN, NN; input data from port to A

MOV M, A; data transfer A → RAM cell,

whose address is in (H+L)

INX H; (H+L) = (H+L+1)

INR C; counter = counter+1

SUI, ETX; terminator check

If the number of data words is known and stored in cell with address 81N0, then the data acquisition program will look like:

LDA, 81N0; forwarding contents 81N0 → (A)

MOV C, A; counter = array length: A → (C)

DCR C; counter = counter-1

JNZ, address SAVE; collection continues if not 0

Let's look at several examples of processing a data array.

LXI H, 8100; storing in (H+L) the start address

data array

SUB A; battery reset: (A) ← 0

ADDN: ADD M ; addition of element M+(A) → (A)

INX H; move to next address

(H+L) ← (H+L+1)

DCR B; counter decrement: (V) ← (V-1)

JNZ, ADDN address; loop organization if not 0

M (COUNT) → (A)

MOV B, A; organization of an account in register B:

NEXTE: DCR B; counter decrement: (V) ← (V-1)

JNZ, address DONE; checking the end of the loop: if 0,

then jump to the label address DONE

INX H; (H+L) ← (H+L+1)

CMP M; comparison with maximum

JMP, NEXTE address;


Literature

1. G.I. Pukhalsky. Programming of microprocessor systems. Textbook for Universities - M. Polytechnic, 2002.

2. V.S. Yampolsky. Fundamentals of automation and electronic computer technology. – M.: Education, 1991.

3. L.N. Ananchenko, I.E. Rogov. Drawing up algorithms and programs in Assembly language for controlling technological processes: Method. instructions - Rostov-on-Don: DSTU, 1993.

4. L.N. Ananchenko. KR580IK80 microprocessor command set: Method. instructions - Rostov-on-Don, RISHM, 1991.







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