Decoding post codes for asus motherboards. New generation of POST cards
PI0049
POST card for computer defect detection motherboards, model PI0049, is designed to display POST codes of all BIOS manufacturers. This product is better known as PC Ana-lyz-er 2, the operating features of which have been repeatedly discussed on the pages of our website. The user manual contains a list of engineering passwords, as well as a list of standard keyboard shortcuts for entering the BIOS. The development of the POST card is protected by patent 01224987.4 (China).
PI0050
POST card IC80 V5.0
QiGuan KLPI6
The KLPI6-SD diagnostic card manufactured by QiGuan Electronics is made in accordance with the international standard IEC 61010-1, which sets the requirements for low-voltage overvoltage test equipment. Functional feature POST cards KLPI6-SD - ability to display POST codes personal computer on the external display panel. In addition to the current code, both indicators display previous values, as well as the POST code of the fatal failure.
QiGuan MKCP6A
The board for diagnosing a personal platform and testing it for stability (Diagnostics and Stability Test Card), model MKCP6A, was developed by QiGuan Electronics using technology protected by national patent 03126857.9 (China). To display POST codes, there are three pairs(!) of indicators on the board: the first pair is designed to display a faulty code, the next pair displays the current POST code, and the last pair displays the previous code.
SL-M04A
A rare version of the user manual in Turkish for the diagnostic POST controller PC Analyzer (PC Analizoru in Turkish). In addition to the well-known descriptions of POST codes, it includes a list control points almost all well-known BIOS manufacturers. For convenience, all post codes are sorted by number, making them easier to access and understand. Comments for them follow directly after the code and are separated by the name BIOS.
18.03.2019
POST-codesAward BIOS Medallion V 6.0
POST code (hex) Check completed
Performing POST startup procedures from Flash BIOS
CF Early detection of processor type. Recording results in CMOS. CMOS read/write functional test.
If processor type detection or CMOS writing fails, a fatal operation error is set and POST execution is stopped.
C0 Chipset pre-initialization.
Prohibition of shadow RAM areas, disabling L2 cache. Clear L1 cache.
Programming the following basic chipset registers.
- Interrupt controllers: receive on IRQ edge, Master Controller - IRQ 00h=INT 8...IRQ 7=INT 0Fh, Slave Controller - IRQ 8= INT 70h...IRQ 15=INT 77h.
- DDP controllers.
- Interval timer: Counter 0 - frequency division mode by 65,536 (18.2 Hz) to generate IRQ 0 system clock requests. Counter 1 - generation of pulses for DRAM regeneration (128 cycles are performed in 2 ms or the interval between regeneration of two lines is about 15 μs). Counter 2 - used to sound the system speaker.
- The RTC is initialized if there is a battery power failure. If there was no Vcc (bat) failure, then only the registers responsible for the interaction between the RTC and the processor are initialized, but not the clock
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Checking the type, size, high address and ECC of RAM. Checking the first 256 KB of RAM. |
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Organization in this area of a transit buffer, into which from Flash BIOS |
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Boot Block is copied to verify checksums |
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Examination checksum BIOS and the presence of the BBSS tag. If the checks are incorrect, |
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a decision is made about partial damage to the Flash BIOS IC. If checks |
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are correct, then the unpacking program is copied to the buffer system BIOS |
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Unpacking the system BIOS into RAM, copying the optional system into RAM |
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BIOS. Preparing for BIOS Shadowing |
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Copy the executable POST code to the shadow RAM area E000h-F000h. |
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Transfer control to the Boot Block module. |
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Start POST from shadow RAM. |
Checking the integrity of the BIOS structure. If the checksums for checking the BIOS service fields match, the RAM check continues, otherwise control is transferred to the BIOS recovery programs
Performing POST on Shadow RAM )
1 At physical address 1000:0000h, the BIOS module is unpacked - the XGROUP program, which allows you to set all the resources of the motherboard, including the system timer, interrupt controllers and DMAs, a mathematical coprocessor and a default video controller
3 Performing early initialization of the Super I/O chip, the first stage was performed in algorithm steps CFh and C0h
5 Setting the initial attributes of the video system.
Checking the CMOS status flag, its contents are reset
7 Reset the input and output buffers of the keyboard controller (8042 or 8742 compatible). The controller is part of the Super I/O system chip
fees. Self-test, initialization of the keyboard controller. Keyboard interface connection allowed
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Prohibition of connecting the PS/2 computer mouse interface. |
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The type of keyboard interface is determined (PS/2 or AT/DIN). Programmable |
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keyboard controller. Keyboard allowed |
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The PS/2 mouse interface is still disabled. |
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For some systems - determining the ports to which the PS/2 keyboard is connected |
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and mouse, which may cause port reassignment |
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Checking the shadow segment F000h with read and write cycles. This area |
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will be used for DMI and ESCD. If the check is incorrect, then |
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is being produced sound signal and error code EFh is output to port 0080h |
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If the written and read data from the F000h segment do not match, |
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an error is detected and the POST execution is stopped |
10 Determining the type of installed Flash BIOS. The check allows you to select the appropriate writing program for the BIOS, with the help of which a special Read Intelligent Identifier command is loaded. The command is also used by the procedures for modifying ESCD and DMI blocks, which can be overwritten both during boot and after it - when applications access the Plug and Play or DMI functions.
BIOS code executed in a work session will be decoded and written to the Run-time area (F000h).
Programming chipset registers
12 Perform a chain of CMOS tests. IN RTC clock the power mode is set. CMOS cells are subsequently used to store intermediate results during the initialization procedure. In particular, default values are loaded into cells
14 Perform early chipset initialization. At the first stage, resources that are not available to the motherboard developer are programmed. At the second stage, the values changed using the MODBIN utility are loaded into the chipset registers. Becomes possible fine tuning RAM and PCI devices
16 Early initialization of the system clock - setting to default values
18 Determination of processor parameters: manufacturer, family, generation, determination of the type and size of L1 and L2 cache, SMI type. Executing the CPUID command function (processor codes and architecture various manufacturers differ).
Checking processor registers, measuring processor core clock speed. After executing the function, the result is placed in a 128-bit word formed by the register cells of the central processor - EAX + EBX + ECX + EDX. To decrypt the value of the cache being used, the code is shifted and moved to the AL register
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Initialization of the interrupt vector table (volume 1,024 bytes, 256 types |
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interrupts). At this stage, the types for 32 vectors are established (INT 00h- |
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INT 1Fh), indicating BIOS procedures. |
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Performing checks to ensure Y2K compliance |
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Checking CMOS checksum and supply voltage compliance |
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battery nominal. If errors are detected, the values are set according to |
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defaults set by the motherboard manufacturer |
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At this stage, receiving scan codes from the keyboard and processing them by the 8742 controller and processor is impossible, since interrupts are disabled, the BIOS data area is not prepared, and the keyboard is not initialized. Setup BIOS settings must not conflict with the execution of the POST sequence
21 Initializing the Hardware Power Management system for laptops.
Formation of a table of physical parameters, a structure for servicing autonomous battery power, energy-saving functions when operating hard drives, as well as operations for saving a RAM image on a disk
23 Math coprocessor detection.
Checking the number of cylinders - 40 or 80, as well as the type of floppy disk installed.
Perform early chipset initialization.
Preparing a BIOS resource map intended for further installation of Plug and Play devices, as well as airborne devices on the PCI bus
24 In processors Intel generations P6 and P7 provide the ability to organize access to microprogram memory, which contains algorithms for executing each machine command. At this stage, changes can be made to the firmware microcode to modernize the algorithms or introduce new microcodes designed for new machine instructions. The microcode update procedure is as follows.
- Using the CPUID command, the processor is identified and its parameters are determined - Type, Family, Model and Stepping.
- The required block of 2,048 bytes is read from the microcode update module stored in the BIOS and unpacked not into RAM, but into SM RAM.
- The processor microcode is updated.
Some Intel processors require additional identification. The resource distribution map is being updated
Plug and Play devices are initialized. Information about resources requested by Plug and Play devices is updated based on scanning data from CMOS, BIOS extensions located on the expansion buses, as well as information stored in the ESCD data block. Writing data to ESCD is deferred until the final stage of POST execution
25 Early PCI initialization. Enumeration of devices on the bus. Assignment of RAM and airborne resources.
Search for a video system device, BIOS extensions and write information to area C000:0h (segment address in the CS register: offset address in the IP register)
26 Configuring the logic that serves the Vendor Identification lines.
Completes system clock initialization. Disable synchronization of unused DIMM and PCI slots.
Initialization of the voltage and temperature monitoring system, performed according to the type of motherboard
At this stage, receiving scan codes from the keyboard and processing them by the 8742 controller and processor is impossible, since interrupts are disabled, the BIOS data area is not prepared, and the keyboard is not initialized. Setup BIOS settings must not conflict with the execution of the POST sequence
27 Interrupt enable INT 09h. Re-initialization of the keyboard controller based on new data (interrupt vector table, chipset initialization).
For the BIOS, a 16-character input buffer is formed and a memory area is set for full operation
29 Programming MTRR registers of the P6 generation processor, as well as initializing the APIC controller of Pentium processors.
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Programming the chipset (such as an IDE controller) according to |
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with settings in CMOS. |
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Measuring the internal processor frequency. |
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Calling the video system BIOS extension |
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Initializing the multilingual module. |
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Sending data to be displayed on the display screen (Award screen saver, type |
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processor and its speed) |
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Super I/O Chip Programming |
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Checking the masking bits of interrupt controller channel 1 (compatible |
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40 Checking the masking bits of channel 2 of the interrupt controller (compatible with IC 8259)
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Checking the functioning of the interrupt controller (compatible with IC 8259) |
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Calculate total memory by checking each double word in each 64 KB page. |
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Recording a program designed to test AMD family processors |
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Programming MTRR registers of the Syrix family processor. Initialization |
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L2 cache of P6 generation processors, as well as APIC initialization for P6 |
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USB bus initialization |
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Check all memory, clear extended memory |
55 For a multiprocessor platform, the number of processors is displayed
57 Displays the Plug and Play logo screen. Early provisioning of Plug and Play devices
59 Activating the anti-virus protection resource - the integrated anti-virus tool Trend Anti-Virus
60 Stage allowing you to load the Setup program.
Before this POST stage you must have time to press the appropriate key
65 Initializing a PS/2 computer mouse
67 Preparing information for the address space intended for the call function: INT 15h (contents of register AX=E820h)
At this stage, receiving scan codes from the keyboard and processing them by the 8742 controller and processor is impossible, since interrupts are disabled, the BIOS data area is not prepared, and the keyboard is not initialized. Setup BIOS settings must not conflict with the execution of the POST sequence
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Enabling L2 cache |
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Programming chipset registers in accordance with the elements described |
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in Setup and in the autoconfiguration table |
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Assign resources to all Plug and Play devices. |
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Automatic COM port allocation for integrated devices |
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if the Setup option is set to “AUTO” |
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Initializing the floppy disk controller. |
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Additional configuration of floppy disk registers |
73 Optional BIOS update utility input function AWDFLASH.EXE if it is on a floppy disk and the key combination is selected
75 Detection and installation of all IDE devices: hard drives, LS-120, ZIP, CD-R/RW, DVD, etc.
If an error is detected, a corresponding message is displayed and the program waits for a keystroke.
If no error is detected or a key is pressed
Cleaning the EPA or Manufacturer Logo Screen Saver
82 Depending on the type of chipset and motherboard, an area is allocated in RAM for power management.
The ESCD table is updated with the latest changes related to power management.
After removing the splash screen with the EPA logo, the video mode is restored. Request a password, if provided by CMOS settings
83 Restoring data from a temporary storage stack in CMOS
84 Displays the message “Initializing Plugand Play Cards...” about previously detected Plug and Play devices and parameters
85 USB initialization completed.
Determining boot order from SCSI hard drives
87 Switching the video system to text mode.
Construction of SYSID tables in the DNI area according to the “System Management BIOS” specification.
To serve network devices, a UUID (Universal Unique ID) is created, as well as an identifier for booting from Fire Wire IEEE 1394 devices
At this stage, all basic initialization procedures have been completed. Preparing to download operating system, the tables necessary for this are compiled, arrays and structures are formed
89 If the Setup program allows the use of the ACPI protocol, the corresponding tables are inserted into the upper 4 GB address space
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Scanning in the PCI space for BIOS extensions designed for |
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implementation of the AOL (Alert On LAN) protocol. Initializing AOL Tools |
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Allowing the use of logical means to support unmasked |
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NMI interrupts. |
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Enable the use of RAM module parity |
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For PS/2 mouse hot plugging, IRQ 12 is allowed. |
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IRQ 11 line maintenance, normalization of line noise parameters |
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interrupt requests |
91 Preparing conditions for servicing hard drives in Power Management mode. Operations of this type (Suspend to RAM) can be implemented in a working session of the operating system.
Setting BIOS variables that store the base addresses of serial and parallel ports that host BIOS expansion programs
93 Preparing to save information about boot device partitions
94 If Setup is provided, the L2 cache is enabled. The Boot Up Speed parameter is programmed.
Completing initialization of the chipset and power management system.
Removing the BIOS startup screen, a resource distribution table is displayed on the monitor screen.
Configuring registers for AMD K6 family processors. Final update of processor registers Intel family P6.
Final initialization of the Remote Pre Boot subsystem
95 Mode setting automatic transition for winter/summer time Daylight Saving.
Programming the keyboard controller for the number of keystrokes per second and the wait time before entering auto-repeat mode.
Reading keyboard KBD ID.
For a 101-key keyboard, the NumLock flag is set according to the CMOS information
96 Saving information about boot device partitions.
In multiprocessor systems, the final configuration of the system is performed, service tables and fields used in the working session of the operating system are formed.
Configuring registers for Cyrix family processors.
Filling and updating the ESCD table in accordance with the state of the Power Management system of Plug and Play and ATAPI devices.
Adjustment of CMOS in accordance with the requirements of the Y2K protocol.
Setting the system clock counter DOS Time in accordance with the RTC CMOS readings. The time value from the “hours:minutes:seconds” format is recalculated
in clock cycles (time intervals of pulse repetition) of the 18.2 Hz interval timer and is recorded in the BIOS variable area - DOS Time.
At this stage, all basic initialization procedures have been completed. Preparations are being made for loading the operating system, the tables necessary for this are compiled, arrays and structures are formed
Saving boot device partitions for future use by integrated antivirus tools Trend Anti-Virus and Paragon Anti-Virus Protection.
Enable the use of L1 cache.
A sound signal for the end of POST is generated on the system unit speaker. Building and saving the MSIRQ table.
Preparing to boot the operating system
FF Transfer control to the initial sector loader program BOOT. Performing BIOS INT 19h interrupt.
The called subroutine allows (in accordance with the BIOS Features Set Up menu option in the Setup program) to poll boot devices to search for the boot sector. To load information from the sector Cylinder: 0, Head: 0, Sector:
1 is read at address 07C0:0000h, after which control of the FAR JMP command is transferred to the beginning of this block
Executing a program written in the boot sector
NOTE.
ECC(Error Correcting Code) — error correction code used in RAM modules, contributing increasing PC fault tolerance. ECC allows error correction in one bit and detection in two bits. Therefore, a computer whose memory uses such codes can operate without interruption in the event of an error in one bit, and the data will not be distorted
BBSS(Boot Block Specification Signature) - Boot block specification signature label.
SMI(System Management Interrupt) - Hardware, integrated into the processor, designed to control power consumption. A high priority interrupt is used to service these components.
Y2K— requirements, requirements for commercial computer system products for ensuring interoperability, functionality and other parameters that occurred before and after 2000.
DMI(Desktop Management Interface) - protocol, allowing for interaction software with motherboard components.
MTRR(Memory Type Range Registers - generation processor registers P6 And P7, in which Data is entered that describes the properties of memory areas and determines the type of memory caching.
APIC ( Advanced Programmable Interruption Controller) - advanced programmable interrupt controller, included in the chipset. Processor generation P6 Also has a similar controller for multiprocessor applications.
MSIRQ(Microsoft IRQ Routing Map) - table cards distribution interrupts, standardized by Microsoft.
SM RAM(System Management RAM) - one of the names for random access register memory small capacity provided in the processor architecture, starting with Pentium Pro and higher, intended for storing service data.
If each process fails adequately, the algorithm switches to special case processing and POST BIOS Medallion generates the codes noted below:
POST-codesspecialcasesAward BIOS V 6.0 Medallion
System Events codes
Code activated when servicing APM or ACPI components (Power Management Debug codes)
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Energy saving with +12 V supply voltage cut-off |
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Switching to operating mode with minimal power consumption |
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Interrupt to exit power saving mode by event |
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Switching the processor into power saving mode by reducing its clock speed |
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Switching to partial power saving mode using ACPI technology |
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Using the SMI Component to Enter Power Saving Mode |
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Putting the processor into power saving mode using APM technology |
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Switching the system into power saving mode using APM technology |
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Putting the system into full power saving mode |
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Message about fatal errors during operations (System Error codes)
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ECC code processing error |
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Error hard drive when returning from power saving mode |
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Data mismatch when writing to and reading from segment F000h |
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To reduce travel time test program POST Award BIOS you can use the Quick Power On Self Test option, which can be found in the Setup program. In this case, a modified version of the Award Software test is launched, which, unlike the full version of the program, runs quickly.
POST AMI BIOS 8 V1.4 checkpoint codes
Understanding the Breakpoint Code Display
To display POST AMI BIOS checkpoints, POST Diagnostic Cards, indicators on system boards, and displays control AMI BIOS Checkpoint Display.
The display is a line of code in the lower right corner of the monitor screen that appears during POST.
The disadvantage of using the checkpoint code display is that it cannot be used when the video system is turned off.
Purpose of the Device Provisioning Manager
During various periods of POST testing, control is transferred to a special program DIM device initialization manager(Device Initialization Manager).
This program receives control from the BIOS if it is necessary to check the system or local buses of the computer. There are several POST checkpoints designed to run this program.
2Ah initialization of devices on the system bus.
38h initialization of IPL devices.
39h indication of errors during bus initialization.
95h initialization of buses controlled by BIOS extensions.
DEh - RAM configuration error.
DFh - RAM configuration error.
Messages generated by the DIM are also output to diagnostic port 80h and stored in the data word while the test is running.
The word in which the marked information is stored contains the low byte, which matches the system POST code. The high byte is divided into two tetrads. Below is a description of the codes loaded into notebooks.
Fields of the senior tetrad.
Initialization of all devices on the buses of interest is prohibited.
Initialize static devices on the buses of interest.
Initialization of information output devices on the buses of interest.
Initialization of information input devices on the buses of interest.
Initializing devices system boot(IPL) on the tires of interest.
Initialization of general purpose devices on the buses of interest.
Error messages for the tires of interest.
Initialization of devices controlled by BIOS extensions (for all buses).
Initialize BIOS boot extensions that comply with the BIOS Boot Specification (for all buses).
Junior tetrad.
System initialization procedures (DIM).
Buses for connecting integrated system devices.
ISA bus Plug and Play.
PCMCIA bus.
If a RAM configuration error is detected, a cyclic sequence of codes DEh, DFh and configuration checkpoints is output to the diagnostic port, which can take the following values.
00 No RAM detected.
01 different types of DIMMs are installed.
02 Reading from the SPD (Serial Presence Detect) node of the DIMM failed.
03 DIMM cannot be used at this frequency.
04 DIMM cannot be used in this system.
05 error in the low memory page.
Error Message | Description |
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System is booting properly |
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BIOS ROM checksum error | The contents of the BIOS ROM to not match the expected contents. If possible, reload the BIOS from the PAQ |
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Check the video adapter and ensure it"s seated properly. If possible, replace the video adapter |
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7 beeps (1 long, 1s, 1l, 1 short, pause, 1 long, 1 short, 1 short) | The AGP video card is faulty. Reseat the card or replace it outright. This beep pertains to Compaq Deskpro systems |
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1 long neverending beep | Memory error. Bad RAM. Replace and test | |
Reseat RAM then retest; replace RAM if failure continues |
Error Message | Description |
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System is booting properly |
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Initialization error | Error code is displayed |
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System board error | ||
Video adapter error | ||
EGA/VGA adapter error | ||
3270 keyboard adapter error | ||
Power supply error | Replace the power supply |
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Power supply error | Replace the power supply |
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Replace the power supply |
Beeps/Error | Description |
Continuous beeping | System board failure |
One beep; Unreadable, blank or flashing LCD | LCD connector problem; LCD backlight inverter failure; video adapter faulty; LCD assembly faulty; System board failure; power supply failure |
One beep; Message "Unable to access boot source" | Boot device failure; system board failure |
One long, two short beeps | System board failure; Video adapter problem; LCD assembly failure |
One long, four short beeps | Low battery voltage |
One beep every second | Low battery voltage |
Two short beeps with error codes | POST error message |
System board failure |
IBM Intellistation BIOS:
Beep error code: | Action / Run diagnostics on the following components: |
| 1-1-3 CMOS read/write error | 1.Run Setup 2.System Board |
| 1-1-4 ROM BIOS check error | 1.System Board |
| 1-2-X DMA error | 1.System Board |
| 1-3-X | 1.Memory Module 2.System Board |
| 1-4-4 | 1. Keyboard 2.System Board |
| 1-4-X Error detected in first 64 KB of RAM. | 1.Memory Module 2.System Board |
| 2-1-1, 2-1-2 | 1.Run Setup 2.System Board |
| 2-1-X First 64 KB of RAM failed. | 1.Memory Module 2.System Board |
| 2-2-2 | 2.System Board |
| 2-2-X First 64 KB of RAM failed. | 1.Memory Module 2.System Board |
| 2-3-X | 1.Memory Module 2.System Board |
| 2-4-X | 1.Run Setup 2. Memory Module 3.System Board |
| 3-1-X DMA register failed. | 1.System Board |
| 3-2-4 Keyboard controller failed. | 1.System Board 2. Keyboard |
| 3-3-4 Screen initialization failed. | 1. Video Adapter (if installed) 2.System Board 3.Display |
| 3-4-1 Screen retrace detected an error. | 1. Video Adapter (if installed) 2.System Board 3.Display |
| 3-4-2 POST is searching for video ROM. | 1. Video Adapter (if installed) 2.System Board |
| 4 | 1. Video Adapter (if installed) 2.System Board |
| All other beep code sequences. | 1.System Board |
| One long and one short beep during POST. Base 640 KB memory error or shadow RAM error. | 1.Memory Module 2.System Board |
| One long beep and two or three short beeps during POST.(Video error) | 1. Video Adapter (if installed) 2.System Board |
| Three short beeps during POST. | 1. See "System board memory" on page 62. 2.System Board |
| Continuous beep. | 1.System Board |
| Repeating short beeps. | 1. Keyboard stuck key? 2.Keyboard Cable 3.System Board |
Error Message | Description |
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System is booting normally |
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Video adapter error | The video adapter is either faulty or not seated properly. Check the adapter |
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Keyboard controller error | The keyboard controller IC is faulty. Replace the IC if possible |
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The keyboard controller IC is faulty or the keyboard is faulty. Replace the keyboard, if problem still persists, replace the keyboard controller IC |
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The programmable interrupt controller is faulty. Replace the IC if possible |
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The programmable interrupt controller is faulty. replace the IC if possible |
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DMA page register error | The DMA controller IC is faulty. Replace the IC if possible |
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RAM refresh error | ||
RAM parity error | ||
DMA controller 0 error | The DMA controller IC for channel 0 has failed |
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The CMOS RAM has failed |
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DMA controller 1 error | The DMA controller IC for channel 1 has failed |
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CMOS RAM battery error | The CMOS RAM battery has failed. If possible, replace the CMOS or battery |
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CMOS RAM checksum error | The CMOS RAM has failed. If possible, replace the CMOS |
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BIOS ROM checksum error | The BIOS ROM has failed. If possible replace the BIOS or upgrade it |
Error Message | Description |
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System is booting normally |
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Video adapter failure | Either the video adapter is faulty, not seated properly or is missing |
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1 long, 1 short, 1 long | Keyboard controller error | Either the keyboard controller IC is faulty or the system board circuitry is faulty |
1 long, 2 short, 1 long | Either the keyboard controller is faulty or the system board circuitry is faulty |
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1 long, 3 short, 1 long | ||
1 long 4 short, 1 long | The programmable interrupt controller IC is faulty |
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1 long, 5 short, 1 long | DMA page register error | The DMA controller IC 1 or 2 is faulty or the system board circuitry is faulty |
1 long, 6 short, 1 long | RAM refresh error | |
1 long, 7 short, 1 long | ||
1 long, 8 short, 1 long | RAM parity error |
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1 long, 9 short, 1 long | DMA controller 1 error | The DMA controller for channel 0 is faulty or the system board circuitry is faulty |
1 long, 10 short, 1 long | Either the CMOS RAM is faulty. Replace the CMOS |
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1 long, 11 short, 1 long | DMA controller 2 error | The DMA controller for channel 1 is faulty or the system board circuitry is faulty |
1 long, 12 short, 1 long | CMOS RAM battery error | The CMOS RAM battery is faulty or the CMOS RAM is bad. Replace the battery if possible |
1 long, 13 short, 1 long | CMOS checksum error | The CMOS RAM is faulty |
1 long 14 short, 1 long | BIOS ROM checksum failure | The BIOS ROM checksum is faulty. Replace the BIOS or upgrade |
Phoenix ISA/MCA/EISA BIOS:
The beep codes are represented in the number of beeps. E.g. 1-1-2 would mean 1 beep, a pause, 1 beep, a pause, and 2 beeps.
- With a Dell computer, a 1-2 beep code can also indicate that a bootable add-in card is installed but no boot device is attached. For example, in you insert a Promise Ultra-66 card but do not connect a hard drive to it, you will get the beep code. I verified this with a SIIG (crap -- avoid like the plague) Ultra-66 card, and then confirmed the results with Dell.
Error Message | Description |
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CPU test failure | The CPU is faulty. Replace the CPU |
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System board select failure | The motherboard is having an undetermined fault. Replace the motherboard |
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CMOS read/write error | The real time clock/CMOS is faulty. Replace the CMOS if possible |
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Extended CMOS RAM failure | The extended portion of the CMOS RAM has failed. Replace the CMOS if possible |
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BIOS ROM checksum error | The BIOS ROM has failed. Replace the BIOS or upgrade if possible |
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The programmable interrupt timer has failed. Replace if possible |
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DMA read/write failure | The DMA controller has failed. Replace the IC if possible |
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RAM refresh failure | The RAM refresh controller has failed |
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64KB RAM failure | The test of the first 64KB RAM has failed to start |
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First 64KB RAM failure | The first RAM IC has failed. Replace the IC if possible |
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First 64KB logic failure | The first RAM control logic has failed |
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Address line failure | The address line to the first 64KB RAM has failed |
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Parity RAM failure | The first RAM IC has failed. Replace if possible |
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EISA fail-safe timer test | Replace the motherboard |
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EISA NMI port 462 test | Replace the motherboard |
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64KB RAM failure | Bit 0; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 1; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 2; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 3; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 4; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 5; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 6; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 7; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 8; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 9; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 10; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 11; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 12; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 13; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 14; This data bit on the first RAM IC has failed. Replace the IC if possible |
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64KB RAM failure | Bit 15; This data bit on the first RAM IC has failed. Replace the IC if possible |
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Slave DMA register failure | The DMA controller has failed. Replace the controller if possible |
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Master DMA register failure | The DMA controller had failed. Replace the controller if possible |
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Master interrupt mask register failure | ||
Slave interrupt mask register failure | The interrupt controller IC has failed |
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Interrupt vector error | The BIOS was unable to load the interrupt vectors into memory. Replace the motherboard |
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Keyboard controller failure | ||
CMOS RAM power bad | Replace the CMOS battery or CMOS RAM if possible |
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CMOS configuration error | The CMOS configuration has failed. Restore the configuration or replace the battery if possible |
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Video memory failure | There is a problem with the video memory. Replace the video adapter if possible |
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Video initialization failure | There is a problem with the video adapter. Reseat the adapter or replace the adapter if possible |
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The system's timer IC has failed. Replace the IC if possible |
||
Shutdown failure | The CMOS has failed. Replace the CMOS IC if possible |
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Gate A20 failure | The keyboard controller has failed. Replace the IC if possible |
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Unexpected interrupt in protected mode | This is a CPU problem. Replace the CPU and retest |
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RAM test failure | System RAM addressing circuitry is faulty. Replace the motherboard |
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Interval timer channel 2 failure | The system timer IC has failed. Replace the IC if possible |
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Time of day clock failure | The real time clock/CMOS has failed. Replace the CMOS if possible |
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Serial port failure | A error has occurred in the serial port circuitry |
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Parallel port failure | A error has occurred in the parallel port circuitry |
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Math coprocessor failure | The math coprocessor has failed. If possible, replace the MPU |
Description |
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Verify real mode |
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Initialize system hardware |
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Initialize chipset registers with initial values |
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Set in POST flag |
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Initialize CPU registers |
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Initialize cache to initial values |
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Initialize power management |
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Load alternative registers with initial POST values |
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Jump to UserPatch0 |
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Initialize timer initialization |
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8254 timer initialization |
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8237 DMA controller initialization |
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Reset Programmable Interrupt Controller |
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Test DRAM refresh |
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Test 8742 Keyboard Controller |
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Set ES segment register to 4GB |
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Clear 512K base memory |
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Test 512K base address lines |
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Test 51K base memory |
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Test CPU bus-clock frequency |
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CMOS RAM read/write failure (this commonly indicates a problem on the ISA bus such as a card not seated) |
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Reinitialize the chipset |
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Shadow system BIOS ROM |
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Reinitialize the cache |
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Autosize the cache |
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Configure advanced chipset registers |
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Load alternate registers with CMOS values |
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Set initial CPU speed |
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Initialize interrupt vectors |
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Initialize BIOS interrupts |
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Check ROM copyright notice |
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Initialize manager for PCI Options ROMs |
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Check video configuration against CMOS |
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Initialize PCI bus and devices |
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initialize all video adapters in system |
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Shadow video BIOS ROM |
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Display copyright notice |
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Display CPU type and speed |
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Set key click if enabled |
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Test for unexpected interrupts |
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Display prompt "Press F2 to enter setup" |
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Test RAM between 512K and 640K |
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Test expanded memory |
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Test extended memory address lines |
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Jump to UserPatch1 |
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Configure advanced cache registers |
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Enable external and CPU caches |
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Initialize SMI handler |
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Display external cache size |
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Display shadow message |
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Display non-disposable segments |
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Display error messages |
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Check for configuration errors |
|
Test real-time clock |
|
Check for keyboard errors |
|
Setup hardware interrupt vectors |
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Test coprocessor if present |
|
Disable onboard I/O ports |
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Detect and install external RS232 ports |
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Detect and install external parallel ports |
|
Reinitialize onboard I/O ports |
|
Initialize BIOS Data Area |
|
Initialize Extended BIOS Data Area |
|
Initialize floppy controller |
|
Initialize hard disk controller |
|
Initialize local bus hard disk controller |
|
Jump to UserPatch2 |
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Disable A20 address line |
|
Clear huge ES segment register |
|
Search for option ROMs |
|
Shadow option ROMs |
|
Setup power management |
|
Enable hardware interrupts |
|
Scan for F2 keystroke |
|
Clear in-POST flag |
|
Check for errors |
|
POST done - prepare to boot operating system |
|
Check password (optional) |
|
Clear global descriptor table |
|
Clear parity checkers |
|
Check virus and backup reminders |
|
Try to boot with INT 19 |
|
Interrupt handler error |
|
Unknown interrupt error |
|
Pending interrupt error |
|
Initialize option ROM error |
|
Extended Block Move |
|
Shutdown 10 error |
|
Keyboard Controller failure (most likely problem is with RAM or cache unless no video is present) |
|
Initialize the chipset |
|
Initialize refresh counter |
|
Check for Forced Flash |
|
Do a complete RAM test |
|
Do OEM initialization |
|
Initialize interrupt controller |
|
Read in bootstrap code |
|
Initialize all vectors |
|
Initialize the boot device |
|
Boot code was read OK |
Quadtel BIOS:
Error Messages | Description |
|
System is booting normally |
||
The CMOS RAM is faulty. Replace the IC if possible |
||
The video adapter is faulty. Reseat the video adapter or replace the adapter if possible |
||
Peripheral controller error | One or more of the system peripheral controllers is bad. Replace the controllers and retest |
Any computer repairman knows that the POST Card PCI is used to diagnose problems when repairing and upgrading computers such as IBM PC (or compatible ones).
Several companies produce such cards in Russia and the CIS: Master Kit (Moscow), e-KIT Post Cards, ACE Lab (N. Novgorod), BVG Group (Moscow), EPOS: PCI TESTCARD (Ukraine), IC Book: IC80 (Ukraine ), Jelezo: Jpost Full (Ukraine), VL Comp: PC Analyzer (Belarus). There are also foreign solutions, but we cannot find them on the open market.
POST Card PCI is a computer expansion card that can be installed in any free PCI slot (33 MHz) and is designed to display POST codes generated by the computer BIOS in a user-friendly form.
Conventionally, all POST cards can be divided into serial and non-serial (kits for self-assembly).
Review of existing POST cards
Let's look at the disadvantages of POST cards from various manufacturers.
The founder of the production of PCI POST cards in Russia is considered to be the company ACE Lab, which has a large presence in the production of software and hardware systems for diagnostics and repair of computers.
Master Keith POST Card PCI NM9221 (DIY kit)/BM9221 (finished board). One drawback is that the seven-segment indicator faces downwards.
Advantages of this POST Card: assembled on an FPGA of the EPM3XXX series, supporting Hot-socketing (more reliable, since there is less chance of burning the POST Card) and operating at 3.3V (better compatibility with modern PCI2.3 and PCI3.0 specifications), support for new and old chipsets thanks to removable firmware.
e-Kit_02 Disadvantages of this POST Card: it is assembled on an FPGA of the outdated EPM7XXX series, which does not support Hot-socketing (less reliable, since there is a greater chance of burning the POST Card) and operates at 5.0V (there may be problems with modern PCI2.3 and PCI3.0).
ACE Lab PC-POST PCI-2. It is not convenient that the indicator looks down, but it is possible to select one of 4 possible ports from which information will be read.
ACE Lab PC POWER PCI-2— a fully functional software and hardware complex that allows you to perform a number of diagnostic tests launched from the ROM installed on the board, aimed at identifying system errors and hardware conflicts.
BVG Group Dual POST. Advantages: simple and cheap POST card. Made on the basis of FPGA Altera EPM3032ALC44-10. It carries five LEDs (power supply to PCI - -12V, +12V, +3.3V, +5V, and RESET signal) and two seven-segment indicators on both sides of the board. The indicator may show one digit - this means that the PCI slot into which this POST is inserted is not receiving clocking.
A characteristic disadvantage of this card due to its stripped-down nature is the removal of clocking from the PCI slot in which this card is installed after the POST stage, at which the generator is initialized (for Award BIOS - 26h), as a result of which postcodes are no longer displayed. The methods of “fighting” this disease are as follows:
- If the BIOS Setup contains the Detect DIMM/PCI Clock item, setting it to Disable will prevent the generator from removing the frequency from unused slots, as a result of which Dual POST will work “as normal” ;), showing all the “required” postcodes.
- If the board being tested has Sharing PCI Slots (usually two connectors farthest from the processor, which have one interrupt “for two”), then you can insert any “normal” PCI device (video, audio, network, etc.) into one of them .), and in the other - a postcard. During initialization, the generator, seeing a “full-fledged” PCI device on the Sharing PCI Slots, often (depending on the specific BIOS board) does not remove the clock from both, which Dual POST will successfully “take advantage of”.
BVG Group POST Pro. Instead of seven-segment displays, an LCD display with a ticker is used, but the cost of the card is about 300 USD, which is unreasonably high.
EPOS: PCI TESTCARD. The advanced “Master” series of useful bells and whistles, by and large, only allows you to additionally select a diagnostic port in the range 0-3FFh using switches on the board, which is used to output POST codes. Disadvantages of this POST Card: it is assembled on an FPGA of the outdated EPM7XXX series, which does not support Hot-socketing (less reliable, since there is a greater chance of burning the POST Card) and operates at 5.0V (there may be problems with modern PCI2.3 and PCI3.0). There is also information about the output of incorrect POST codes on some motherboards.
IC Book: IC80. A well-known representative of “adult” postcards, distinctive feature which is the presence of not only “bells and whistles” in the field of monitoring, but also unique (unparalleled) capabilities for debugging the system in a step-by-step mode. The board has several distinctive features:
- Selection of addresses used for diagnostic purposes: 80h/81h and 84h/85h, 378h, 1080h
- Diagnostic codes are displayed on two indicators
- Displaying information on an external indicator
- Voltage indication Stand-By 3.3V
- PCI parity support
- Support for server PCI bus options
A small drawback: the step-by-step mode does not work quite correctly on new boards.
Jelezo: Jpost Full. On some motherboards (mainly GIGABYTE) it freezes to a black screen after the first reboot.
VL Comp: PC Analyzer. A simple and cheap post-controller, the highlight of which is the combination of two types of postcards in one design - for ISA and for PCI.
POST Card PCI BM9222 with LCD Display
Today we will look at the new generation PCI POST card POST Card PCI BM9222 produced by the Moscow company Musker Kit.
Specifications
- Supply voltage: +5 V.
- Current consumption, no more than: 100 mA.
- PCI bus frequency: 33 MHz.
- Diagnostic port address: 0080h
- Indication of POST codes: on the LCD display in two lines of 16 characters each (the first line is the POST code in hexadecimal and separated by a dash - the BIOS type, the second line is a description of the error in the form of a creeping line).
- Indication of PCI bus signals: LEDs on the front side of the board - RST (PCI reset signal) and
- CLK (PCI clock signal).
- Indicators of the presence of PCI bus supply voltages: +5V, +12V, -12V, +3.3V.
- Compatible with motherboard chipsets: Intel, VIA, SIS.
- PCB size: 95.5 x 73.6 mm.
Design
Structurally, the POST Card PCI is made on a double-sided printed circuit board made of foil fiberglass with dimensions of 95.5 x 73.6 mm. In order to improve the electrical conductivity of the device contacts, the lamellas are coated with nickel.
Operating principle of POST Card PCI
Every time you turn on the power of your IBM PC-compatible computer and before the operating system boots, the computer's processor runs a BIOS procedure called POST (Power On Self Test). The same procedure is also performed when pressing the RESET button or when soft reboot computer. To avoid misunderstandings, it should be noted here that in some special cases, in order to reduce the computer boot time, the POST procedure may be slightly shortened, for example, in Quick Boot mode or when exiting Hibernate sleep mode.
The main purpose of the POST procedure is to check the basic functions and subsystems of the computer (such as memory, processor, motherboard, video controller, keyboard, floppy and hard drives, etc.) before loading the operating system. This to some extent protects the user from trying to work on a faulty system, which could lead, for example, to the destruction of user data on the HDD. Before starting each test, the POST procedure generates a so-called POST code, which is output to a specific address in the address space of the computer's input/output devices. If a fault is detected in the device under test, the POST procedure simply freezes, and the pre-printed POST code uniquely determines which test the freeze occurred on. Thus, the depth and accuracy of diagnosis when help POST codes is completely determined by the depth and accuracy of the tests of the corresponding POST BIOS procedure of the computer.
It should be noted that the POST code tables are different for different BIOS manufacturers and, due to the emergence of new tested devices and chipsets, are somewhat different even for different versions of the same BIOS manufacturer. Tables of POST codes can be found on the corresponding websites of BIOS manufacturers: for AMI this is http://www.ami.com, for AWARD - http://www.award.com, sometimes tables of POST codes are given in the manuals for motherboards.
To display POST codes in a user-friendly form, devices called POST Card are used. The proposed POST Card for the PCI bus is a computer expansion card that is inserted (with the power off!) into any free PCI slot (33 MHz) and has a text indicator for displaying POST codes and text information about the current code. Among the operating features of this POST Card, I would like to note that after turning on the computer’s power and before the first active RESET PCI signal appears, the greeting message “BM9222 MASTERKIT POSTCARD” is displayed on the POST Card indicator.
In addition, the POST Card has LEDs that reflect the status of the CLK and RST signals of the PCI bus.
Troubleshooting using POST Card PCI
The sequence of actions when repairing a computer using a POST Card is as follows:
1. Turn off the power to the faulty computer.
2. Install the POST Card into any free PCI slot on the motherboard.
3. Turn on the computer's power.
4. If necessary, adjust the contrast (when installing LCD screen, for PLED - no adjustment required) images by pressing the buttons (the button farthest from the motherboard increases the contrast, the closest one decreases) or we change the type of displayed BIOS - by pressing and holding one of the buttons and pressing the second (after releasing the buttons, the BIOS type will change , displayed in the first line of the indicator after the error code). All of the above settings are saved when the power is turned off and loaded the next time power is applied to the POST Card.
5. We read the information on the POST Card indicator - this is the POST code on which the computer boots “hangs”, and its description in the second line.
6. We comprehend the probable causes.
7. With the power off, we rearrange cables, memory modules and other components in order to eliminate the malfunction.
8. Repeat steps 3-7, ensuring stable completion of the POST procedure and the start of loading the operating system.
9. Using software utilities, we carry out final testing of hardware components, and in case of floating errors, we carry out a long run of the corresponding software tests.
When repairing a computer without using a POST Card, points 3-6 of this sequence are simply omitted and from the outside, computer repair looks like just a frantic rearrangement of the memory, processor, expansion cards, power supply, and, to top it all, the motherboard.
If large companies have a large supply of serviceable components, then for small companies and individuals, computer repair by installing known-good components turns into a complex problem.
How is a computer repaired using a POST-Card carried out in practice?
First of all, when the power is turned on, before the POST procedure can begin, the system must be reset with the RST (RESET) signal, which is indicated on the POST Card by changing the greeting message to other POST Card messages. If the change does not occur within 2-4 seconds (the welcome display time is approximately 0.7 seconds) or one of the “NO CODES” or “RESET” messages appears for more than 1 second, then in this case it is recommended to immediately turn off the computer, remove all cards and cables, as well as memory modules from the motherboard. In the system unit, you must leave the motherboard connected to the power supply with installed processor and POST Card fee. If the next time you turn on the computer, the system resets normally and the first POST codes appear, then, obviously, the problem lies in the temporarily removed computer components; it is also possible in incorrectly connected loops. By sequentially inserting the memory, video adapter, and then other cards, and observing the POST codes on the indicator, a faulty module is detected.
Let us now return to the case when the initial system reset does not even go through (the POST Card indicator does not change the greeting message to other messages). In this case, either the computer's power supply is faulty, or the motherboard itself (the RESET signal generation circuits are faulty) or the processor does not start. The exact cause can be determined by connecting a known-good power supply to the motherboard.
Let us now consider the case when the reset signal passes, but no POST codes are displayed on the indicator (the “NO CODES” message is held); in this case, as described earlier, a system consisting only of a motherboard, processor, POST Card and power supply is tested. If the motherboard is completely new, then the reason may be incorrectly installed motherboard jumpers. If all jumpers and the processor are installed correctly, but the motherboard still does not start, you should replace the processor with a known good one. If this does not help, then we can conclude that the motherboard or its components are faulty (for example, the cause of the malfunction may be damaged information in the FLASH BIOS).
The main advantage of the POST Card is that it does not require a monitor to operate. At the same time, testing a computer using a POST Card is possible in the early stages of the POST procedure, when sound diagnostics are not yet available. Another important feature is the display of POST codes on all types of BIOSes that output codes at address 0x0080), but not described in the ROM.
PLED indicator
This testing device is equipped with an indicator with a PLED type display element. The advantages of this type of display are that it has high contrast and a wide viewing angle - this is very important because often a POST card has to be installed in a computer case when other cards (network, sound, etc.) are installed in adjacent slots.
Multi-language support
The POST card allows you to display codes for various types of BIOS in various languages (English and Russian by default). Changing the BIOS type is carried out by simultaneously pressing both buttons at once. This post card decrypts 3 types of BIOSes in 2 languages (6 types in total). The Russified BIOS contains the string “RU” in its name.
The lines themselves describing the codes are located on the 24C256 - 32kB SEEPROM chip. This chip is installed in the socket, and experienced users can remove it and reprogram it with another (newer or different language) version if it appears on the website www.masterkit.ru. Updates occur regularly, tracking trends in the development of computer technology.
If this code is not decrypted in your version, then you should use the Internet to quickly search for a decoding of the test type, and also write a letter to the MasterKit company indicating this case, and in the next version this code will be included.
For reprogramming, you can use the NM9215 (programmer) kit together with an adapter for this type of chip NM9216/4.
Testing a PC system unit with a Post Card PCI tester in practice
The sequence of testing computer components is as follows:
1. CPU testing.
2. Checking the ROM BIOS checksum.
3. Check and initialize DMA, IRQ and 8254 timer controllers.
After this stage, sound diagnostics become available.
4. Checking memory regeneration operations.
5. Testing the first 64 KB of memory.
6. Loading interrupt vectors.
7. Initialization of the video controller.
After this stage, diagnostic messages are displayed on the screen.
8. Testing the full amount of RAM.
9. Keyboard testing.
10. Testing CMOS memory.
11. Initialization of COM and LPT ports.
12. Initialization and test of the FDD controller.
13. Initialization and test of the HDD controller.
14. Search for additional ROM BIOS modules and initialize them.
15. Calling the operating system loader (INT 19h, Bootstrap), if it is impossible to load the operating system systems - attempt launch ROM BASIC (INT 18h); if unsuccessful, system shutdown (HALT).
Taking tests
When passing each of the POST tests, a POST code is generated, which is written to a special diagnostic register. The information contained in the diagnostic register becomes available for observation when the POST Card diagnostic board is installed in a free computer slot and is displayed on a seven-segment display in the form of two hexadecimal digits. The diagnostic register address depends on the type of computer, in older versions it is: ISA, EISA-80h, ISA-Compaq-84h, ISA-PS/2-90h, MCA-PS/2-680h, 80h, some EISA-300h.
First of all, you need to determine the manufacturer Motherboard BIOS fees. This can be done either by a sticker on the BIOS chip, or by the inscriptions that are displayed on the screen by a similar working motherboard. In Russia and the CIS, the most common BIOS are AMI and AWARD. Once you have gained some experience, you can confidently name the BIOS manufacturer based on the first POST codes.
POST code tables are different for different BIOS manufacturers and, due to the emergence of new tested devices and chipsets, are different even for different versions of the same BIOS manufacturer.
Historically, the values of POST codes in the corresponding tables of BIOS manufacturers are given as hexadecimal numbers in the range 00h-FFh (0-255 in decimal system notation), therefore, for ease of use of such tables, it is necessary to ensure the display of POST codes in hexadecimal form.
Fault codes
Award Software International, Inc.
AwardBIOS V4.51PG Elite
The dynamically developing company Award Software in 1995 proposed a new solution at that time in the field of low-level software, AwardBIOS “Elite,” better known as V4.50PG. The control point maintenance mode has not changed either in the widespread version V4.51 or in the rare version V4.60. The suffixes P and G denote support for the PnP mechanism and support for energy saving functions (Green Function), respectively.
Executing startup POST procedures from ROM
C0 External Cache prohibition. Internal Cache prohibition. Ban Shadow RAM. Programming DMA controller, interrupt controller, timer, RTC block
C1 Determining the type of memory, total volume and placement by lines
C3 Checking the first 256K DRAM for the Temporary Area organization. Unpacking BIOS in Temporary Area
C5 Running POST code is moved to Shadow
C6 Determining the presence, size and type of External Cache
C8 Checking the integrity of BIOS programs and tables
CF Determining the processor type
Performing a POST in Shadow RAM
03 Disable NMI, PIE (Periodic Interrupt Enable), AIE (Alarm Interrupt Enable), UIE (Update Interrupt Enable). Prohibition of generation of programmable frequency SQWV
04 Checking the generation of requests for DRAM regeneration
05 Checking and initializing the keyboard controller
06 Test the memory area starting at address F000h, where the BIOS is located
07 Checking CMOS and battery operation
BE Programming the configuration registers of the South and North Bridges
09 Initializing the L2 Cache and Advanced Cache Control Registers on the Cyrix Processor
0A Generating a table of interrupt vectors. Configuring Power Management Resources and Setting the SMI Vector
0B Checking the CMOS checksum. Scanning PCI bus devices. Processor microcode update
0C Initializing the Keyboard Controller
0D Finding and initializing the video adapter. Setting up IOAPIC. Clock measurements, FSB setting
0E MPC initialization. Video memory test. Displaying the Award Logo
0F Testing the first DMA 8237 controller. Keyboard detection and internal test. BIOS checksum verification
10 Checking the second DMA 8237 controller
11 Checking DMA controller page registers
14 System Timer Channel 2 Test
15 Test of the request masking register of the 1st interrupt controller
16 Interrupt controller 2 request masking register test
19 Checking the Passivity of an NMI Interrupt Request
30 Determination of the volume of Base Memory and Extended Memory. APIC setup. Software control of Write Allocation mode
Preparing tables, arrays and structures for starting the operating system
31 The main on-screen RAM test. Initialization
32 The Plug and Play BIOS Extension splash screen appears. Setting up Super I/O resources. Programmable Onboard Audio Device
39 Programming the clock generator via the I2C bus
3C Setting the software flag to allow entry into Setup
3D Initializing PS/2 mouse
3E External Cache Controller Initialization and Cache Permissions
B.F. Setting up chipset configuration registers
41 Initializing the floppy disk subsystem
42 Disable IRQ12 if PS/2 mouse is missing. Performed soft reset hard drive controller. Scanning other IDE devices
43 Initializing serial and parallel ports
45 Initializing the FPU coprocessor
4E Display of error messages
4F Password Request
50 Restoring a previously stored CMOS state in RAM
51 Resolution of 32 bit access to HDD. Configuring ISA/PnP Resources
52 Initializing additional BIOS. Setting the values of PIIX configuration registers. Formation of NMI and SMI
53 Setting the DOS Time counter according to Real Time Clock
60 Installing BOOT Sector antivirus protection
61 Final steps to initialize the chipset
62 Reading the keyboard ID. Setting its parameters
63 Correction of ESCD, DMI blocks. Clearing RAM
FF Transferring control to the bootloader. BIOS executes INT 19h command
Let's consider the procedure for testing the system unit of a personal computer. Let's install the BM9222 tester into a free PCI slot on the motherboard. Let's turn on the power. BIOS is a computer boot program stored in the motherboard ROM that sequentially polls all devices included in the system unit (processor, memory modules, hard drive, video card, controllers, optical drive, outer periphery: keyboard mouse, etc.).
If all peripheral devices of the system unit are working properly, then after loading is complete, the following inscription FFh will light up on the tester screen.
“Let’s introduce a fault” into the system unit. Turn off the power and remove the memory module from the system unit.
After power is applied and the computer boots, the RAM error code 4Eh appears on the tester screen.
The tester accurately determined that the memory in the system unit is “faulty.” After turning off the power and returning the memory module to its place, the tester showed the health of the personal computer.
Similarly, you can determine the error codes of other peripheral devices and quickly resolve the problem by replacing the faulty unit with a working one.