What is known about the Russian Elbrus microprocessors? History and technical description of Elbrus processors.

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Many people have heard and are using desktop processors from Intel and AMD. Oldfags remember that about 10 years ago they had a competitor - processors from VIA (which, alas, could not stand the competition). Well, geeks really know about the Soviet-Russian Elbrus processors (although, however, in the light of the latest news, quite a lot of people know about them). Therefore, in this article we will talk about these processors: how they were created, what architecture they worked on, and what they are now.

The USSR was well aware that the future lies with processors. At the same time, it was not good to take developments from other companies - it was necessary that both the element base and theoretical developments take place on the territory of the country (which, however, did not prevent using reverse engineering to create many clones of processors from Intel up to 286). As a result, in 1980, the Elbrus-1 computing complex was introduced, which was built according to the TTL standards (transistor-transistor logic - microcircuits consisting of bipolar transistors and resistors, where transistors played the role of not only logic elements, but also were used to amplify output signal) and included 10 CPUs. The total performance was at the level of 12 million operations per second: for example, the Intel 8086 processor, from which, in fact, the x86 processors went, could execute 330 thousand op / s, and only Intel i486DX, released 10 years later, could compete with this computing complex.

In 1985, a new computing complex, Elbrus-2, was introduced. He also had 10 CPUs, but they were built on the basis of the IS-100 integrated circuits (obtained using reverse engineering from Motorola processors in the 10,000th series). Each processor had a frequency of 20 MHz, and in total the cluster could operate with 144 MB of RAM. The external memory was magnetic tape, and the addressable volume reached 700 MB (the same as on a regular CD-blank). The total performance was already 125 million op / s - this is comparable to the Cortex M3 architecture processors with a frequency of 100 MHz, which, for example, play the role of coprocessors for sensors in the iPhone (and are called Apple M7-M10): yes, the performance of the entire computing cluster , which occupied more than one room and required serious cooling, now fits in a tiny chip in a smartphone.

A new round of development for Elbrus came in troubled times, 1989-1994: it was no longer possible to engage in reverse engineering: firstly, Russia was not the USSR, and patents of foreign firms could no longer be violated. Secondly, it is one thing to engage in reverse engineering of a processor with 100 thousand transistors, and another with tens of millions: it is much more complicated. As a result, I had to switch to the VLIW architecture (it was specially created for multiprocessor systems: one processor instruction contains several operations performed in parallel, and it is known which computing unit performs which operation). Obviously, there was no compatibility with Elbrus-2, nor was there any money for production, so Elbrus was “buried” before the start of the 2000s.

The latest time, the development of the MCST

In the early 2000s, when the main problems in the country were resolved, the government again turned its attention to domestic processors. Alas, time was lost: from 1994 to 2000, Intel made a huge leap: processors increased frequencies by an order of magnitude, the manufacturing process also decreased by an order of magnitude. But the Elbrus essentially remained at the level of the early 90s, and something had to be decided.

And here, in my opinion, the ICST made a serious mistake: realizing that the architecture needed to be changed, they chose SPARC. Of course, the x86 processors were closed for them, but there was a stably developing ARM, which, like SPARC, was free to license. And if the latter stopped its development already in 1993 on the ninth version, then ARM is developing further. Fortunately, the MCST quickly realized the impasse of this path, and in 2005 they introduced the first processor using its own Elbrus architecture, and this architecture continues to develop. But still 5 years have been lost, which is a rather serious period for processors.

Let's talk about Elbrus in more detail. This architecture is based on the same VLIW and Elbrus-3 developments of the 90s. The main difference from the usual RISC (these are ARM and SPARC) and CISC (x86) is the principles of dependency analysis and the execution order of the incoming instruction stream: in traditional architectures, it is the processor that finds independent operations and runs them in parallel on different kernels, and this dynamic dependency analysis and support for the extraordinary execution of instructions leads to the fact that modern processors can execute 4-6 instructions per clock cycle. In the Elbrus architecture, the compiler takes the bulk of the work on dependency analysis and optimizing the order of operations. The processor receives the so-called input. “Wide commands”, in each of which instructions for all executive devices of the processor that should be run on this clock cycle are encoded. The processor is not required to analyze dependencies between operands or rearrange operations between wide commands: all this is done by the compiler based on source code analysis and processor resource planning. As a result, processor hardware can be simpler and more economical, and processors can execute up to 23 (and even 33 in some cases) instructions per clock cycle!

As a result, the Elbrus architecture successfully corrects the main problem of modern computing systems - parallelizing the task to a large number of threads: if Intel or AMD have problems with this (the most commonplace example - in games 4-core i7 are at or even better than 8-core Ryzen), then MCST This is a problem overcome.

Performance Elbrus

Another important feature of the Elbrus is that they are able to "twist" the x86 code in dynamic binary translation mode - that is, you can run Windows and full-fledged programs for it on them. Dynamic binary translation allows you to convert binary x86 instructions codes into Elbrus machine codes on the fly, that is, in fact, a virtual machine starts with a full BIOS, and the x86 code is already running on it.

As a result, we can evaluate performance immediately by two parameters: firstly, in GFLOPS, this is purely mathematical performance, which allows you to approximately evaluate the capabilities of processors on any architecture. Elbrus 4C, which is now the most productive of those that can be bought, has 4 cores with a frequency of 800 MHz, is built on the 65 nm process technology, has 8 MB of L2 cache and double-precision performance at 25 Gflops. For evaluation - Intel Core 2 Quad Q6600, a 4-core powerful processor, released at the end of the zero, has a performance of 35 Gflops. i7-4770, the pre-processor processor of 2013-2014, already has a performance of 250 Gflops. True, they both have a heat output of 65 watts versus 45 for Elbrus, but the difference in performance is much more significant.

The second way to evaluate performance is to launch Windows, which was done: Windows 7 and the game GTA: Vice City (which is over 10 years old) were launched on Elbrus-4C:

The most interesting moment occurs at 10:07 - you can see on the screen that the Pentium 4 processor with a frequency of 800 MHz is emulated, and the amount of available RAM is 2.5 GB:

What does that tell us? The fact that each core in its capabilities is comparable to Pentium 4, that is, it supports all the same instructions as the processor of almost 15 years ago - no AVX, only MMX and older versions of SSE (though there are 4 cores here, but the case isn’t one where quantity turns into quality). Therefore, software will work normally only until the mid-zero - everything that is newer already requires at least SSE 4, and generally speaking, AVX. And the second - the virtual machine requires 1 GB of RAM (since only 4 GB of the x86 system should have 3.5 available, and here - 2.5), which is quite small. In general, all this is great, but still worse than the development of competitors: for example, Windows 10 was launched and worked normally on an ARM processor, and they didn’t run there a toy of 15 years ago, but rather heavy Photoshop.

Moreover, low productivity is not even the main problem: a Linux-based OS was created for Elbrus, and there the performance is more than good - there are no problems with running office programs and browsers, and most users (and office workers) do not need more. The main problem in cost is that since production is small, the cost of each chip turns out to be sky-high, and a fully finished PC costs more than 100 thousand rubles: for that kind of money, you can now collect either a good gaming PC or an average workstation. The MCST offers for the same amount essentially an ordinary office PC, the price of which does not exceed 15 thousand rubles even when purchasing PCT components. Therefore, the only obvious use case is in state-owned enterprises, where the price does not matter. Ordinary people still have to use the "Basurm" technique, but who knows - maybe in 10 years, Elbrus will become competitive.

Since the birth of computer technology in our country, the design of high-performance systems has been considered as one of the most important goals of Russian science. Since the 90s, research has been associated with a fundamentally new condition - the need to carry out new developments based on Russian microprocessors. As a result, Elbrus was created - a processor that is not inferior to the best foreign models in its computing power.

History of creation

Currently, only a few countries around the world are designing computers using microprocessors of their own design - in the United States, England, Japan and China. Obviously, in the framework of security and import substitution, Russia also needs its own processor, sufficient to meet the requirements of the armed forces, law enforcement agencies, government and education. And if possible - and commercialization of the product. After decades of active work, scientists and engineers at the Moscow Center for Spark Technologies (MCST) are not ashamed to present the latest development of 2014-15: the eight-core Elbrus 8s processor. But before this historical event, a long path of theoretical calculations and practical research was covered.

In the USSR, the work of Academician S. A. Lebedev was of outstanding importance in the formation and development of computer technology. The Institute of Precision Mechanics and Computing Engineering (ITM and VT), which he leads at the Academy of Sciences, created fifteen models of electronic (computer) computers, from the first, tube, to high-speed machines on integrated circuits.

"Elbrus-1"

The idea of \u200b\u200ban architectural line, subsequently incorporated into the Russian Elbrus processor, was born in 1969. The reason for the development was the need for "intellectualization" of strategic systems. The chief designer was V. S. Burtsev, an outstanding specialist in computer technology, later an academician of the Russian Academy of Sciences.

In 1979, the first generation of the Elbrus multiprocessor computing complex (MVC) was presented at ITM and VT of the state commission. The processor was designed based on TTL logic. The system was used in the military industry.

"Elbrus-2"

Six years later, the second generation of the Elbrus MVK successfully passed the test. The processor and the new were completely domestic development. The system was based on the IS-100 series high-speed emitter-coupled logic. The performance of Elbrus-2 in a ten-processor configuration was 125 million operations per second.

MVK was built on a modular basis with increased reliability. Due to its speed and fault tolerance, the complex has been used for many years in key objects of strategic systems. The MVK characteristics unique for that time were achieved by the introduction and development of a number of advanced ideas in the organization of the computing process.

"Elbrus-3"

The next stage (1986-1994) was the creation of the third generation MVK Elbrus. The processor has become even more powerful, the elemental base has become more advanced. Corresponding Member of the Academy of Sciences B. A. Babayan was chosen as the project manager. By the way, he made a fundamental contribution to the development of the Elbrus-1 and Elbrus-2 MVK.

Assessing the advantages and disadvantages of the superscalar architecture he developed, implemented in the second generation of the MVK, Boris Artashesovich suggested a more advanced implementation of the concept of a broad command word. Before the collapse of the Union, experts managed to collect a prototype, but the new authorities stopped funding in the future.

Latest time

The continuation of this project line is connected with the activities of the MCST. In its structure, leading domestic microelectronics engineers, having made a principled bet on the use of microprocessor technologies, proceeded to create two series of microprocessors and computer complexes based on them. These works subsequently allowed the creation of a powerful Russian processor Elbrus 2014 release.

The design basis for the first series was the open architecture Scalable Processor Architecture (SPARC), specified by Sun Microsystems. Based on it, processors of the "R" family were created.

The basis of the second series was the original Elbrus architecture, developing the principles that were tested and incorporated into the MVK-3 (originally it was called the “E2k architecture”). In total, four main types of processors were created. So, "Elbrus" (processor): a comparison of the models is shown in the table below.


Year of creation
Clock frequency
Process technology
Number of Cores
Performance

	Elbrus-3M1	Elbrus-S	Elbrus-2C +	Elbrus-4C
Year of creation
Clock frequency
Process technology
Number of Cores
Performance

Elbrus-4s

One of the last successful developments of the MCST company was the Elbrus-4s processor. Its architecture is based on an original development, based on the VLIW microarchitecture. 4 cores of 800 MHz are responsible for the calculation processes, 2 MB cache on each core.

Despite the apparent archaism in terms of production technology (large size, low frequency, technological process of the “last century” 65 nm), the efficiency of the electronic device is comparable to Intel processors “i”. With less power consumption (45 W), its performance is up to 50 GFlops. For comparison: the older Extreme Edition model has a performance of 53 GFlops with much higher frequencies and power consumption. This modern Russian Elbrus processor of 2014 has passed the required tests and entered the series.

Elbrus-8S

It seems that the time of evolution has ended, the time has come for a revolutionary breakthrough for domestic microelectronics. CJSC “MCST” together with the Institute of Electronic Control Machines developed and produced engineering samples of a new generation product. The Elbrus 8s processor is being prepared for industrial production. It is being created using the 28-nanometer process technology.

The device will work in tandem with the controller also domestic development KPI-2. Although the controller is still being manufactured using the 65 nm process technology, it supports three gigabit Ethernet network controllers, 20 2.0 lines, eight USB 2.0 ports, eight SATA ports. Data exchange with the processor is 16 Gb / s.

Specifications

The manufacturer revealed the main characteristics of the latest Elbrus system:

Processor - 8 cores without hypertreading.
The area of \u200b\u200bthe crystal is 350 mm 2.
The cache of the second level for each core is 512 Sq.
Layer 3 cache is shared - 16 MB.
Execution per cycle - 30 operations.
The clock frequency is 1.3 GHz, with these parameters uninterrupted operation of all cores is guaranteed for an unlimited time, even with one hundred percent load.
Performance (peak) - 250 Gflops.
Power - 60-90 watts.
Licensed independence from Intel, while providing support for major operating systems with x86 / x86-64 architecture.

As you can see, the Russian Elbrus processor of the latest generation is five times more productive than the 4C model.

Architecture

As the most important result, the company MCST developed the original Elbrus microprocessor architecture. The processor is focused on obtaining maximum performance indicators for these hardware resources. In the general classification, it belongs to the category of architectures that use the VLIW (Very Large Instruction Word) principle, when the compiler generates for parallel execution sequences of groups of commands (wide command words) in which there are no dependencies between teams within a group and dependencies are minimized between teams in different groups.

Thus, the Russian Elbrus processor to a high degree uses the parallelism at the level of operations present in this program code. As a result, high architectural speed is achieved due to the release of equipment from the parallelization functions inherent in superscalar architectures, and their transfer to the optimizing compiler. This also led to another important feature inherent in the Elbrus architecture - the low energy consumption of the equipment.

Along with the effective use of parallelism of operations, the Elbrus device architecture also implements the implementation of other types (levels) of parallelism inherent in the computing process:

parallelism of tasks in multi-machine complexes;
concurrency of control flows on shared memory;
vector concurrency.

X86 architecture compatibility

As a fundamental requirement for architecture, the developers initially considered ensuring effective binary compatibility with the dominant architecture of the Intel x86 microprocessor. It is implemented on the basis of covert dynamic translation and its support in the equipment of the Elbrus microprocessor. Also, the defining properties of the new Russian architecture include the developed hardware support for secure computing (modular programming), which greatly facilitates the work of programmers when creating large software systems with limited execution time.

Practical use

Where is it planned to use Russian processors? It must be understood that this product is being developed for the sole purpose of providing self-sufficient microelectronics and computer technology independent of deliveries and licensing. Computers on the Elbrus processor with a high level of security and protection against computer viruses are in demand in the military industry, in security services, and important state institutions.

Meanwhile, the system allows you to install familiar Windows and Linux, which opens the way, if not to the ordinary consumer, then to the corporate sector. MCST offers secure computers and servers that can operate in adverse environments.

One of the company's projects was the development of the first Russian desktop computer based on the Elbrus-4C processor. It received the name "Workstation Elbrus-401" (where workstation stands for automated workstation). The model is designed for an office in a MiniTower standard enclosure. But it can be used in various fields with increased requirements for information security.

The computer has a 65 nm process technology with a clock frequency of 800 Hz, SATA-2 and USB 2.0 ports, a pre-installed 120 GB SSD with mSATA interface and support for DDR3-1600 with ECC. The basic configuration is offered 24 GB of RAM (expandable up to 96 GB). Among the architectural features of the "Workstation Elbrus-401" can be identified as follows: the presence of 6 parallel channels of arithmetic-logic devices; register file of 256 84-bit registers; hardware loop support; support for speculative computing and single-bit predicates; a command that can set up to 23 operations in a single cycle with maximum filling. The computer also has an AMD Radeon 6000 series graphics card.

Computer "AWP Elbrus-401"

The processor of the new generation - "Elbrus-8C"

The Elstrus-8C processor is being developed by the MCST company with the participation of the Institute of Electronic Control Machines (INEUM) named after I.S. Brooke. The architecture, circuitry and topology of the microprocessor were created by Russian specialists. The processor has eight cores with an improved 64-bit Elbrus architecture. The clock frequency reaches 1.3 GHz, the cache volume of the second and third levels is 4 and 16 MB. Estimated performance reaches 250 GFLOPS.

Specifications "Elbrus-8C"

The computer has its own Elbrus architecture, which was developed at ZAO MTsST. Vector command system accelerators help make encryption and signal processing faster.

The interaction of the hardware with the OS occurs through its own BIOS microcode. The processor is compatible with Linux, FreeBSD, QNX, Windows XP distributions, but the recommended Elbrus operating system based on the Linux 2.6.33 kernel. The use of specialized development tools (optimizing compilers from C and C ++, Fortran, Java, etc.) makes it possible to optimize the program code taking into account the Elbrus architecture.

Elbrus-8C processor

The company is already developing utilities and auxiliary components optimized for working on processors. This is all - tools for working with the network and peripherals (utilities, general purpose libraries, services, database support, graphics subsystem).

"Elbrus-8C" should be paired with KPI 2 - the controller of peripheral interfaces of Russian production.

There are many myths around Elbrus. You can meet them in the comments to any post or article about Elbrus. The main categories of myths can be reduced to three questions:

1. Is Elbrus domestic? Domestic means safe?
2. What is the performance? How "modern" is a computer based on Elbrus.
3. How much does it cost?

Each question has two opposite answers. From "Chinese bought" to "all of ours." From "my phone is faster" to "still a little bit and overtake Intel."

I would like to clarify where the ears of all these myths grow. The reason, by and large, is the same: the MTsST company - their secrecy, silence and, in the worst traditions of Russian reality, a tendency to overestimate and lightly gouge. In preparing this article, I was faced with the fact that all the information on the news and iron resources revolves around the mean press releases of the ICST. It is very difficult to find new information “from above”. You have to dig, read between the lines and dig even deeper. The ICST itself does not respond to emails and orders. Find contacts on the site - try it!

Bravura speeches “five-year period in three days”, as well as stories about “catching up and overtaking”, come from the same place. It is enough to re-read the press releases for 2013-2015. Now we should have serial production of the latest computers based on Elbrus-16S. Do you see him? Me neither!

About tricks with technological processes of production it is possible to read in this article on Habré.

To get away from abstraction and debunk myths with something specific, we will take the AWP (Workstation) Elbrus-401. This computer is produced in small series. It even seems to be available for ordering on the site. Formally.
Specifications taken from the official site.

Parameter	Value
Microprocessor	Elbrus-4C (1891VM8YA)
Number of processors	1
Operating processor frequency, MHz	800
Peak Performance, Gflops	50
RAM, GB	24 (up to 96), support for error correction (ECC)
Video subsystem	Integrated video card based on VLSI Silicon Motion SM718 Supports 2D acceleration, video scaling 16 MB of video memory, connection to the PCI bus VGA output, DVI Resolution up to 1920 x 1080 AMD Radeon 6000 Series 3D Graphics PCI Express Bus Connection
Disk subsystem	SATA 2.0 hard drive 1000 GB, 3.5 "(up to 2 drives) CompactFlash card slot on board mSATA drive on a 120 GB board
Integrated drive	DVD-RW drive. Dual layer disc support
Network interfaces	Support for data transfer speeds of 10/100/1000 Mbps
Sound	Integrated Sound Card AC-97 (stereo)
Input / output ports	USB 2.0: 4 connectors on the rear panel, 2 connectors on the front panel. 2 internal ports on the motherboard 1 Gigabit Ethernet (10/100/1000 Mb / s) 1 DVI + VGA output (combined). It is possible to connect two monitors through an adapter (included) 1 RS-232 port external, 1 RS-232 port internal connectors for audio (input / output, stereo)

Origin

So, how domestic and safe was the computer?

The most domestic processor. Its architecture and resulting blocks are completely domestic development. It was calculated and emulated on the FPGA Stratix V. Most likely on the Quartus software.

Now one EP2S180 chip costs about $ 8K. So the cost of only FPGA chips in the prototype exceeds $ 50K.
For prototyping the Elbrus-4C + processor, 21 Altera Stratix IV EP4SE820 microcircuits were already required and with a total volume of 100 million valves (although the MCST itself cites a figure of 750 million) and costs about $ 200K. At the same time, the working frequency of the prototype is 9 MHz.
The first caveat: which gigaflops are given? Theoretical, on the LINPACK test? There is no information.
Second. There is a little trick: if you look at the architecture, we will see that there is a DSP processor in the kernel. The characteristics of the previous version of the processor clearly indicated that the total performance consists of the Gigaflops of the main core plus the DSP core. For example, you can compare the Descriptions on the MTsST Monocub website based on the Elbrus-2C + processor and the processor itself.
But in real everyday applications from the DSP processor is of little use. They will be good at signal processing and encryption.
Here we are again confronted with the problem of closure. If anyone has an AWP, he does not conduct tests, or he does not upload the results.
But back to the main issue, performance in real applications and everyday work. The only tests I managed to find on this topic are with Cnews. Tests and their results can be viewed here.
Who is too lazy to go, the essence is this. It takes Intel Core i7-2600 (3.4 GHz) and Elbrus-4C. I was interested in the following.
It turns out that the only "real" tests with the 7z archive show that AWP is seriously losing. Not as it should be according to Gigaflops, only twice, but 5.5 times on compression and almost 4 times on unpacking (I counted according to MIPS, because the memory is different). By the way, the conclusions and attempts to “pull the owl on the globe” will be confusing. It seems that the resource was given Elbrus with the condition of writing a positive review.

The eight-core Elbrus-8S processor, manufactured by the 28 nm process, was presented at the fourth conference, “IT in the Service of the Military-Industrial Complex”. The largest specialized event uniting developers and IT specialists of the military-industrial complex began yesterday in Innopolis (Republic of Tatarstan) and will last until May 29.

The final stage of work on the creation of a domestic microprocessor at a new process technology for Russia was announced by Alexander Yakunin, General Director of the United Instrument-Making Corporation, a member of Rostec.

“A breakthrough result was achieved within the framework of the Baikal project, which we are conducting together with the T-Platforms company,” explained Alexander Yakunin. - The first engineering sample of the Baikal-T processor with the revolutionary 28 nm process technology for Russia has just been released.

The next Russian development will be a new generation of Elbrus processors using the same process technology. Its creation has reached the final stage, the next engineering release is now being tested. ”

Elbrus-8S is being developed by the Institute of Electronic Control Machines (INEUM) named after I. S. Brook with the participation of the MCST company. Its characteristics are as follows:

crystal area 350 sq. mm;
eight identical processor cores without hypertreading;
512 KB second level cache per core;
third level cache - general, 16 MB;
own architecture "Elbrus", developed in the CJSC "MCST";
command system with vector accelerators and instructions for accelerating mathematical calculations, encryption and signal processing. They are not allocated in separate extensions, but are provided initially;
the system of optimizing binary code translation ensures compatibility with x86 / x86-64 architectures with licensed independence from Intel and achievement of performance at the level of 80% of the native one;
the ability to directly execute commands without binary translation in twenty OS distributions and over a thousand popular applications (the list is quickly updated);
built-in protection mechanisms against malicious code: structured memory with access to objects through descriptors and contextual protection for language visibility areas; definition of violation of object boundaries (buffer overflow), use of uninitialized data and dangerous deviations from programming standards.
support for four memory slots standard PC3-12800 (DIMM DDR3-1600);
execution of 30 operations per cycle;
1.3 GHz clock frequency - the planned frequency ceiling at which one hundred percent load of all eight cores is possible for an unlimited time under standard conditions. To work in adverse (and especially field) operating conditions for protection against overheating, an automatic frequency reduction circuit (analogue throttling) and (temporary) software shutdown of individual cores by means of the operating system will be implemented;
peak performance of 250 GFlops on single precision floating point calculations (FP32) when all FPUs are fully loaded;
power dissipation at the level of 60 - 90 W (calculated indicators);
the processor is soldered directly on the board, which reduces the cost of packaging the chips and their rejection.

Elbrus-8S will work in tandem with the controller of peripheral interfaces of domestic design - KPI-2.

This chip, which is currently being manufactured using the 65 nm process technology, supports 20 PCI-Express 2.0 bus lines (8 + 8 + 4), three gigabit Ethernet network controllers, eight SATA v.3.0 ports and eight USB 2.0 ports. The data exchange rate with the processor at KPI-2 is 16 GB / s.

In addition to supporting basic interfaces, it contains an integrated SPMC controller that provides energy-saving functions, as well as an interrupt controller.

The hardware part interacts with the operating system through its own BIOS microcode. It is possible to work with distributions of Linux, FreeBSD, QNX, Windows XP, but for critical areas of application, the Elbrus OS based on the Linux 2.6.33 kernel is recommended. The ICST team has done a great job of creating a real-time OS with its own interrupt processing, synchronization, memory management and tagged computing support mechanisms. All this is aimed at revealing the potential of the architecture of the domestic processor and protection against common exploits.

Optimization of program code taking into account the Elbrus architecture is achieved through the use of specialized development tools: optimizing compilers from C and C ++, Fortran and Java, debuggers, tools and libraries for parallelizing computations. Among the latter, it is possible to use a message interface between processes (MPI) and the open standard OpenMP.

Development of Elbrus processors.

Utilities and auxiliary components optimized for running on Elbrus processors are already being created. These are utilities, services, general-purpose libraries, database support, a graphics subsystem (based on Xorg, GTK + and Qt), tools for working with a network and peripherals.

The primary task is to carry out import substitution at key defense industry facilities and strategically important Russian infrastructure facilities. Computerra is already talking about the technical feasibility of creating a hardware-level Trojan in Intel’s Ivy Bridge architecture, which is extremely difficult to detect. This work of researchers was carried out at the University of Massachusetts and was positioned as a proof of concept - similar bookmarks can be created in other processors.

“The use of technology with foreign key components poses great threats in the areas of management and production critical for the country,” says Alexander Yakunin. “First of all, from the point of view of data protection and hidden opportunities to influence the operation of equipment from the outside”

State tests of the Elbrus-8C processor are scheduled for the end of this year. In the case of their successful passage, serial production will begin in 2016. While we are talking more about small-scale production at the level of about 50 thousand processors per year, this is already a huge step for Russian microelectronics.

“At the end of this - the beginning of next year, T-Platforms are due to complete work on the new Baikal-M processor, and in 2018 we plan to introduce Elbrus-16C using the same technology of 28 Nm, with a frequency of 1.5 GHz and with performance over 512 GFlops, ”says Alexander Yakunin, his immediate plans. It is already known that the next Elbrus processor will perform 50 operations per cycle. Its calculated productivity will be 2.5 times higher than that of Elbrus-8S.

The article uses materials of the United Instrument-Making Corporation OJSC.